1. OE8001 Data Sheet_draft

Sun Professional All In 1 TabletsRevision: 2022-01-23Version:07.2Safety Data SheetAccording to Regulation (EC) No 1907/2006SECTION 1: Identification of the substance/mixture and of the company/undertaking1.1 Product identifierTrade name: Sun Professional All In 1 TabletsSun is a registered trade mark and is used under licence of Unilever UFI: PT26-S0D0-4005-92VN1.2 Relevant identified uses of the substance or mixture and uses advised againstSWED - Sector-specific worker exposure description :AISE_SWED_PW_8a_2AISE_SWED_PW_8b_2PC35-Washing and cleaning products AISE_SWED_PW_1_1AISE_SWED_PW_4_1PC35-Washing and cleaning products1.3 Details of the supplier of the safety data sheetDiversey Europe Operations BV, Maarssenbroeksedijk 2, 3542DN Utrecht, The NetherlandsContact details Diversey LtdWeston Favell Centre, Northampton NN3 8PD, United Kingdom Tel: 01604 405311, Fax: 01604 4068091.4 Emergency telephone numberSeek medical advice (show the label or safety data sheet where possible)For medical or environmental emergency only: call 0800 052 0185SECTION 2: Hazards identification2.1 Classification of the substance or mixture Eye Irrit. 2 (H319) 2.2 Label elementsSignal word: Warning. Contains subtilisin (Subtilisin)Hazard statements:H319 - Causes serious eye irritation.EUH208 - May produce an allergic reaction.Precautionary statements:P102 - Keep out of reach of children.P305 + P351 + P338 - IF IN EYES: Rinse cautiously with water for several minutes. Remove contact lenses, if present and easy to do. Continue rinsing.P337 + P313 - If eye irritation persists: Get medical advice or attention.Product use:Dish wash product. Uses advised against:Uses other than those identified are not recommended.2.3 Other hazardsNo other hazards known.SECTION 3: Composition/information on ingredients3.2 MixturesSpecific concentration limitssodium percarbonate:• Eye Dam. 1 (H318) >= 25% > Eye Irrit. 2 (H319) >= 7.5%Workplace exposure limit(s), if available, are listed in subsection 8.1.ATE, if available, are listed in section 11.For the full text of the H and EUH phrases mentioned in this Section, see Section 16..SECTION 4: First aid measures4.1 Description of first aid measuresInhalation: Get medical attention or advice if you feel unwell.Skin contact: Wash skin with plenty of lukewarm, gently flowing water. If skin irritation occurs: Get medical adviceor attention.Eye contact: Hold eyelids apart and flush eyes with plenty of lukewarm water for at least 15 minutes. Removecontact lenses, if present and easy to do. Continue rinsing. If irritation occurs and persists, getmedical attention.Ingestion: Rinse mouth. Immediately drink 1 glass of water. Never give anything by mouth to an unconsciousperson. Get medical attention or advice if you feel unwell.Self-protection of first aider: Consider personal protective equipment as indicated in subsection 8.2.4.2 Most important symptoms and effects, both acute and delayedInhalation: No known effects or symptoms in normal use.Skin contact: No known effects or symptoms in normal use.Eye contact: Causes severe irritation.Ingestion: No known effects or symptoms in normal use.4.3 Indication of any immediate medical attention and special treatment neededNo information available on clinical testing and medical monitoring. Specific toxicological information on substances, if available, can be found in section 11.SECTION 5: Firefighting measures5.1 Extinguishing mediaCarbon dioxide. Dry powder. Water spray jet. Fight larger fires with water spray jet or alcohol-resistant foam.5.2 Special hazards arising from the substance or mixtureNo special hazards known.5.3 Advice for firefightersAs in any fire, wear self contained breathing apparatus and suitable protective clothing including gloves and eye/face protection. SECTION 6: Accidental release measures6.1 Personal precautions, protective equipment and emergency proceduresNo special measures required.6.2 Environmental precautionsDo not allow to enter drainage system, surface or ground water.6.3 Methods and material for containment and cleaning upCollect mechanically. Do not place spilled materials back into the original container. Collect in closed and suitable containers for disposal.6.4 Reference to other sectionsFor personal protective equipment see subsection 8.2. For disposal considerations see section 13.SECTION 7: Handling and storage7.1 Precautions for safe handlingMeasures to prevent fire and explosions:No special precautions required.Measures required to protect the environment:For environmental exposure controls see subsection 8.2.Advices on general occupational hygiene:Follow general hygiene considerations recognised as common good workplace practices. Keep away from food, drink and animal feeding stuffs. Keep out of reach of children. Do not mix with other products unless adviced by Diversey. Wash face, hands and any exposed skin thoroughly after handling. Avoid contact with eyes. Use only with adequate ventilation. See chapter 8.2, Exposure controls / Personal protection.7.2 Conditions for safe storage, including any incompatibilitiesStore in accordance with local and national regulations. Store in a closed container. Keep only in original packaging. Keep out of reach of children.For conditions to avoid see subsection 10.4. For incompatible materials see subsection 10.5.7.3 Specific end use(s)No specific advice for end use available.SECTION 8: Exposure controls/personal protection8.1 Control parametersWorkplace exposure limitsAir limit values, if available:Biological limit values, if available:Recommended monitoring procedures, if available:Additional exposure limits under the conditions of use, if available:DNEL/DMEL and PNEC valuesHuman exposureDNEL/DMEL oral exposure - Consumer (mg/kg bw)DNEL/DMEL dermal exposure - WorkerDNEL/DMEL dermal exposure - ConsumerDNEL/DMEL inhalatory exposure - Worker (mg/m3)DNEL/DMEL inhalatory exposure - Consumer (mg/m3)Environmental exposureEnvironmental exposure - PNECEnvironmental exposure - PNEC, continued8.2 Exposure controlsThe following information applies for the uses indicated in subsection 1.2 of the Safety Data Sheet.If available, please refer to the product information sheet for application and handling instructions.Normal use conditions are assumed for this section.Recommended safety measures for handling the undiluted product:Appropriate engineering controls: No special requirements under normal use conditions.Appropriate organisational controls: Avoid direct contact and/or splashes where possible. Train personnel.REACH use scenarios considered for the undiluted product:SWED - Sector-specific worker exposuredescription LCS PROC Duration(min)ERCPC35-Washing and cleaning products PC35-Washing andcleaning productsC - - ERC8a Manual transfer and dilution AISE_SWED_PW_8a_2 PW PROC 8a 60 ERC8a Manual transfer and dilution AISE_SWED_PW_8b_2 PW PROC 8b 60 ERC8bPersonal protective equipmentEye / face protection: No special requirements under normal use conditions.Hand protection: No special requirements under normal use conditions.Body protection: No special requirements under normal use conditions.Respiratory protection: If exposure to dust cannot be avoided use: full-face mask (EN 136) with filter type HEPA (N100,Class H14) (EN 1822) or self-contained or compressed air breathing apparatus (EN 137 / EN 138)Consider specific local use conditions. In consultation with the supplier of respiratory protectionequipment a different type providing similar protection may be chosen.Environmental exposure controls: No special requirements under normal use conditions.Recommended safety measures for handling the diluted product:Recommended maximum concentration (% w/w): 0.04Appropriate engineering controls: No special requirements under normal use conditions.Appropriate organisational controls: No special requirements under normal use conditions.REACH use scenarios considered for the diluted product:SWED LCS PROC Duration(min)ERCPC35-Washing and cleaning products PC35-Washing andcleaning productsC - - ERC8a Automatic application in a dedicated closed system AISE_SWED_PW_1_1 PW PROC 1 480 ERC8a Automatic application in a dedicated system AISE_SWED_PW_4_1 PW PROC 4 480 ERC8a Personal protective equipmentEye / face protection: No special requirements under normal use conditions.Hand protection: No special requirements under normal use conditions.Body protection: No special requirements under normal use conditions.Respiratory protection: No special requirements under normal use conditions.Environmental exposure controls: No special requirements under normal use conditions.SECTION 9: Physical and chemical properties9.1 Information on basic physical and chemical propertiesInformation in this section refers to the product, unless it is specifically stated that substance data is listedPhysical state: SolidAppearance: TabletsColour: Speckles , WhiteOdour: Product specificOdour threshold: Not applicableSubstance data, boiling pointFlammability (liquid): Not applicable.( UN Manual of Tests and Criteria, section 32, L.2 )Substance data, flammability or explosive limits, if available:Decomposition temperature: Not applicable.Solubility in / Miscibility with Water: SolubleSubstance data, solubility in waterSubstance data, partition coefficient n-octanol/water (log Kow): see subsection 12.3 Method / remarkMelting point/freezing point (°C): Not determined Not relevant to classification of this product Initial boiling point and boiling range (°C): Not determined Not applicable to solids or gasesMethod / remarkFlammability (solid, gas): Not determinedFlash point (°C): Not applicable.Sustained combustion: Not applicable.Lower and upper explosion limit/flammability limit (%): Not determined See substance dataMethod / remarkAutoignition temperature: Not determinedpH: Not applicableDilution pH: ≈ 11 (0.04 %) ISO 4316Kinematic viscosity: Not determined Not applicable to solids or gasesSubstance data, vapour pressure9.2 Other information9.2.1 Information with regard to physical hazard classes9.2.2 Other safety characteristicsNo other relevant information available.SECTION 10: Stability and reactivity10.1 ReactivityNo reactivity hazards known under normal storage and use conditions. 10.2 Chemical stabilityStable under normal storage and use conditions.10.3 Possibility of hazardous reactionsNo hazardous reactions known under normal storage and use conditions.10.4 Conditions to avoidNone known under normal storage and use conditions.10.5 Incompatible materialsNone known under normal use conditions.10.6 Hazardous decomposition productsNone known under normal storage and use conditions.SECTION 11: Toxicological information11.1 Information on toxicological effectsMixture data:.Relevant calculated ATE(s):ATE - Oral (mg/kg): >2000Substance data, where relevant and available, are listed below:.Acute toxicityAcute oral toxicityAcute dermal toxicityAcute inhalative toxicityAcute inhalative toxicity, continuedIrritation and corrosivitySkin irritation and corrosivityEye irritation and corrosivityRespiratory tract irritation and corrosivity Method / remarkVapour pressure: Not determined See substance dataMethod / remarkRelative density: ≈ 0.93 (20 °C) OECD 109 (EU A.3)Relative vapour density: No data available. Not applicable to solidsParticle characteristics: Not determined. Not relevant to classification of this product. Explosive properties: Not explosive.Oxidising properties: Not oxidising.Corrosion to metals: Not determined Not applicable to solids or gasesSensitisationSensitisation by skin contactSensitisation by inhalationCMR effects (carcinogenicity, mutagenicity and toxicity for reproduction) MutagenicityCarcinogenicityToxicity for reproductionRepeated dose toxicitySub-acute or sub-chronic oral toxicitySub-chronic dermal toxicitySub-chronic inhalation toxicityChronic toxicitySTOT-single exposureSTOT-repeated exposureAspiration hazardSubstances with an aspiration hazard (H304), if any, are listed in section 3.Potential adverse health effects and symptomsEffects and symptoms related to the product, if any, are listed in subsection 4.2.11.2 Information on other hazards11.2.1 Endocrine disrupting propertiesEndocrine disrupting properties - Human data, if available:11.2.2 Other informationNo other relevant information available.SECTION 12: Ecological information12.1 ToxicityNo data is available on the mixture.Substance data, where relevant and available, are listed below:Aquatic short-term toxicityAquatic short-term toxicity - fishAquatic short-term toxicity - crustaceaAquatic short-term toxicity - algaeAquatic short-term toxicity - marine speciesImpact on sewage plants - toxicity to bacteriaAquatic long-term toxicityAquatic long-term toxicity - fishAquatic long-term toxicity - crustaceaAquatic toxicity to other aquatic benthic organisms, including sediment-dwelling organisms, if available:Terrestrial toxicityTerrestrial toxicity - soil invertebrates, including earthworms, if available:Terrestrial toxicity - plants, if available:Terrestrial toxicity - birds, if available:Terrestrial toxicity - beneficial insects, if available:Terrestrial toxicity - soil bacteria, if available:12.2 Persistence and degradabilityAbiotic degradationAbiotic degradation - photodegradation in air, if available:Abiotic degradation - hydrolysis, if available:Abiotic degradation - other processes, if available:BiodegradationReady biodegradability - aerobic conditionsReady biodegradability - anaerobic and marine conditions, if available:Degradation in relevant environmental compartments, if available:12.3 Bioaccumulative potentialPartition coefficient n-octanol/water (log Kow)Bioconcentration factor (BCF)12.4 Mobility in soilAdsorption/Desorption to soil or sediment12.5 Results of PBT and vPvB assessmentSubstances that fulfill the criteria for PBT/vPvB, if any, are listed in section 3.12.6 Endocrine disrupting propertiesEndocrine disrupting properties - Environmental effects, if available:12.7 Other adverse effectsNo other adverse effects known.SECTION 13: Disposal considerations13.1 Waste treatment methodsWaste from residues / unused products: The concentrated contents or contaminated packaging should be disposed of by a certified handler or according to the site permit. Release of waste to sewers is discouraged. The cleaned packaging material is suitable for energy recovery or recycling in line with local legislation.European Waste Catalogue: 20 01 29* - detergents containing dangerous substances. SECTION 14: Transport informationLand transport (ADR/RID), Sea transport (IMDG), Air transport (ICAO-TI / IATA-DGR)14.1 UN number: Non-dangerous goods14.2 UN proper shipping name: Non-dangerous goods14.3 Transport hazard class(es): Non-dangerous goods14.4 Packing group: Non-dangerous goods14.5 Environmental hazards: Non-dangerous goods14.6 Special precautions for user: Non-dangerous goods14.7 Transport in bulk according to Annex II of MARPOL and the IBC Code: Non-dangerous goodsSECTION 15: Regulatory information15.1 Safety, health and environmental regulations/legislation specific for the substance or mixtureNational regulations :• Regulation (EC) 1907/2006 - REACH (UK amended)• Regulation (EC) 1272/2008 - CLP (UK amended)• Regulation (EC) 648/2004 - Detergents regulation (UK amended)• Delegated Regulation (EU) 2017/2100 and Regulation (EU) 2018/605 (UK amended)• Agreement concerning the International Carriage of Dangerous Goods by Road (ADR)• International Maritime Dangerous Goods (IMDG) CodeAuthorisations or restrictions (Regulation (EC) No 1907/2006, Title VII respectively Title VIII): Not applicable.Ingredients according to Detergents Regulationoxygen-based bleaching agents 5 - 15 %phosphonates, polycarboxylates, non-ionic surfactants < 5 %perfumes , enzymesComah - classification: Not classified15.2 Chemical safety assessmentA chemical safety assessment has not been carried out on the mixtureSECTION 16: Other informationThe information in this document is based on our best present knowledge. However, it does not constitute a guarantee for any specific product features and does not establish a legally binding contractSDS code: MSDS6574 Version: 07.2 Revision: 2022-01-23 Reason for revision:Overall design adjusted in accordance with Amendment 2020/878, Annex II of Regulation (EC) No 1907/2006, This data sheet contains changes from the previous version in section(s):, 3, 8, 9, 11, 12, 16Classification procedureThe classification of the mixture is in general based on calculation methods using substance data, as required by Regulation (EC) No1272/2008. If for certain classifications data on the mixture is available or for example bridging principles or weight of evidence can be used for classification, this will be indicated in the relevant sections of the Safety Data Sheet. See section 9 for physical chemical properties, section 11 for toxicological information and section 12 for ecological information.Full text of the H and EUH phrases mentioned in section 3:• H272 - May intensify fire; oxidiser.• H302 - Harmful if swallowed.• H315 - Causes skin irritation.• H318 - Causes serious eye damage.• H319 - Causes serious eye irritation.• H334 - May cause allergy or asthma symptoms or breathing difficulties if inhaled.• H335 - May cause respiratory irritation.• H400 - Very toxic to aquatic life.• H411 - Toxic to aquatic life with long lasting effects.• H412 - Harmful to aquatic life with long lasting effects.Abbreviations and acronyms:• AISE - The international Association for Soaps, Detergents and Maintenance Products• ATE - Acute Toxicity Estimate• DNEL - Derived No Effect Limit• EC50 - effective concentration, 50%• ERC - Environmental release categories• EUH - CLP Specific hazard statement• LC50 - Lethal Concentration, 50% / Median Lethal Concentration• LCS - Life cycle stage• LD50 - Lethal Dose, 50% / Median Lethal dose• NOAEL - No observed adverse effect level• NOEL - No observed effect level• OECD - Organization for Economic Cooperation and Development• PBT - Persistent, Bioaccumulative and Toxic• PNEC - Predicted No Effect Concentration• PROC - Process categories• REACH number - REACH registration number, without supplier specific part• vPvB - very Persistent and very BioaccumulativeEnd of Safety Data Sheet。

Addendum-Page 1PACKAGING INFORMATIONOrderable Device Status(1)Package Type PackageDrawingPins Package QtyEco Plan(2)Lead/Ball FinishMSL Peak Temp (3)Samples (Requires Login)CD54HC373F ACTIVE CDIP J 201TBD A42N / A for Pkg Type CD54HC373F3A ACTIVE CDIP J 201TBDA42N / A for Pkg TypeCD74HC373E ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type CD74HC373EE4ACTIVE PDIP N 2020Pb-Free (RoHS)CU NIPDAU N / A for Pkg Type CD74HC373M ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM CD74HC373M96ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM CD74HC373M96E4ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM CD74HC373M96G4ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM CD74HC373ME4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM CD74HC373MG4ACTIVESOICDW2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3)MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.芯天下--/Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF CD54HC373, CD74HC373 :•Catalog: CD74HC373•Military: CD54HC373NOTE: Qualified Version Definitions:•Catalog - TI's standard catalog product•Military - QML certified for Military and Defense ApplicationsAddendum-Page 2芯天下--/TAPE AND REEL INFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant CD74HC373M96SOICDW202000330.024.410.813.02.712.024.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm)CD74HC373M96SOIC DW202000367.0367.045.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components which meet ISO/TS16949requirements,mainly for automotive ponents which have not been so designated are neither designed nor intended for automotive use;and TI will not be responsible for any failure of such components to meet such requirements.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Mobile Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2012,Texas Instruments Incorporated。

LMK00101January 16, 2012Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input1.0 General DescriptionThe LMK00101 is a high performance, low noise LVCMOS fanout buffer which can distribute 10 ultra-low jitter clocks from a differential, single ended, or crystal input. The LMK00101 supports synchronous output enable for glitch free operation. The ultra low-skew, low-jitter, and high PSRR make this buffer ideally suited for various networking, tele-com, server and storage area networking, RRU LO reference distribution, medical and test equipment applications.The core voltage can be set to 2.5 or 3.3 V, while the output voltage can be set to 1.5, 1.8, 2.5 or 3.3 V. The LMK00101 can be easily configured through pin programming.2.0 Target Applications■LO Reference Distribution for RRU Applications■SONET, Ethernet, Fibre Channel Line Cards■Optical Transport Networks■GPON OLT/ONU■Server and Storage Area Networking■Medical Imaging■Portable Test and Measurement■High-end A/V 3.0 Features■10 LVCMOS/LVTTL Outputs, DC to 200 MHz ■Universal Input—LVPECL—LVDS—HCSL—SSTL—LVCMOS / LVTTL■Crystal Oscillator Interface—Crystal Input Frequency: 10 to 40 MHz■Output Skew: 6 ps■Additive Phase Jitter—30 fs at 156.25 MHz (12 kHz to 20 MHz)■Low Propagation Delay■Operates with 3.3 or 2.5 V Core Supply Voltage ■Adjustable Output Power Supply—1.5 V, 1.8 V, 2.5 V, and 3.3 V For Each Bank ■32 pin LLP Package 5.0 x 5.0 x 0.8 mm4.0 Functional Block Diagram30146901TRI-STATE® is a registered trademark of National Semiconductor Corporation.© 2012 Texas Instruments Incorporated301469 LMK00101 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input5.0 Connection Diagram32-Pin LLP Package301469026.0 Pin DescriptionsPin #Pin Name Type DescriptionDAP DAP -The DAP should be grounded1CLKout0Output LVCMOS Output2, 6Vddo Power Power Supply for Bank A (CLKout0 to CLKout4) CLKout pins.19,23Vddo Power Power Supply for Bank B (CLKout5 to CLKout9) CLKout pins.3CLKout1Output LVCMOS Output 4,9,15,16,21,25,26,32GND GND Ground5CLKout2Output LVCMOS Output 7CLKout3Output LVCMOS Output 8CLKout4Output LVCMOS Output10Vdd Power Supply for operating core and input buffer 11OSCin Input Input for Crystal 12OSCout Output Output for Crystal 13CLKin0Input Input Pin14CLKin0*Input Optional complimentary input pin 17CLKout5Output LVCMOS Output 18CLKout6Output LVCMOS Output 20CLKout7Output LVCMOS Output 22CLKout8Output LVCMOS Output 24CLKout9Output LVCMOS Output27CLKin1*Input Optional Complimentary Input Pin 28CLKin1Input Input Pin29SEL1Input MSB for Input Clock Selection. This pin has an internal pull-down resistor.30SEL0Input LSB for Input Clock Selection. This pin has an internal pull-down resistor.31OEInputOutput Enable. This pin has an internal pull-down resistor. 2L M K 00101 U l t r a -l o w J i t t e r L V C M O S F a n o u t B u f f e r /L e v e l T r a n s l a t o r w i t h U n i v e r s a l I n p u t7.0 Absolute Maximum Ratings (Note 1, Note 2)If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.Parameter Symbol Ratings Units Core Supply Voltage Vdd-0.3 to 3.6VOutput Supply Voltage Vddo-0.3 to 3.6V Input Voltage V IN-0.3 to Vdd + 0.3V Storage Temperature Range T STG-65 to 150°CLead Temperature (solder 4 s)T L+260°C Junction Temperature T J+125°C8.0 Recommended Operating ConditionsParameter Symbol Min Typ Max Units Ambient Temperature T A-402585°CCore Supply Voltage Vdd 2.375 3.3 3.45V Output Supply Voltage (Note 3)Vddo 1.425 3.3Vdd VNote 1:"Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.Note 2:This device is a high performance integrated circuit with ESD handling precautions. Handling of this device should only be done at ESD protected work stations. The device is rated to a HBM-ESD of > 2.5 kV, a MM-ESD of > 250 V, and a CDM-ESD of > 1 kV.Note 3:Vddo should be less than or equal to Vdd(Vddo≤ Vdd)9.0 Package Thermal Resistance32-Lead LLPPackage Symbols Ratings UnitsThermal resistance from junction to ambienton 4-layer Jedec board (Note 4)θJA50° C/WThermal resistance from junction to case(Note 5)θJC (DAP)20° C/WNote 4:Specification assumes 5 thermal vias connect to die attach pad to the embedded copper plane on the 4-layer Jedec board. These vias play a key role in improving the thermal performance of the LLP. For best thermal dissipation it is recommended that the maximum number of vias be used on the board layout.Note 5:Case is defined as the DAP (die attach pad).LMK00101 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input10.0 Electrical Characteristics(2.375 V ≤ Vdd ≤ 3.45 V, 1.425 ≤ Vddo ≤ Vdd, -40 °C ≤ T A ≤ 85 °C, Differential inputs. Typical values represent most likely parametric norms at Vdd = Vddo = 3.3 V, T A = 25 °C, at the Recommended Operation Conditions at the time of product charac-terization and are not guaranteed). Test conditions are: F test = 100 MHz, Load = 5 pF in parallel with 50 Ω unless otherwise stated.SymbolParameterTest ConditionsMinTypMaxUnitsTotal Device CharacteristicsVddCore Supply Voltage2.3752.5 or3.33.45VVddo Output Supply Voltage 1.425 1.5,1.8,2.5, or3.3Vdd VI VddCore CurrentNo CLKin1625mAV ddo = 3.3 V, F test = 100 MHz 24 V ddo = 2.5 V, F test = 100 MHz 20 I Vddo[n]Current for Each OutputV ddo = 2.5 V,OE = High, F test = 100 MHz5 mAV ddo = 3.3 V,OE = High, F test = 100 MHz7 OE = Low 0.1 I Vdd + I VddoTotal Device Current with Loads onall outputsOE = High @ 100 MHz95 mAOE = Low16Power Supply Ripple Rejection (PSRR)PSRRRipple Induced Phase Spur Level100 kHz, 100 mVpp Ripple Injected on V dd , V ddo = 2.5 V-44dBcOutputs (Note 6)Skew Output Skew Measured between outputs,referenced to CLKout06 ps f CLKoutOutput Frequency(Note 7)DC 200MHzt Rise Rise/Fall Time V dd = 3.3 V, V ddo = 1.8 V, C L = 10 pF500 psV dd = 2.5 V, V ddo = 2.5 V, C L = 10 pF 300 V dd = 3.3 V, V ddo = 3.3 V, C L = 10 pF200 V CLKout Low Output Low Voltage 0.1V V CLKout High Output High Voltage Vddo-0.1 R CLKoutOutput Resistance50 ohm t jRMS Additive Jitterf CLKout = 156.25 MHz,CMOS input slew rate ≥ 2 V/ns C L = 5 pF, BW = 12 kHz to 20 MHz30fs 4L M K 00101 U l t r a -l o w J i t t e r L V C M O S F a n o u t B u f f e r /L e v e l T r a n s l a t o r w i t h U n i v e r s a l I n p u tSymbol Parameter Test ConditionsMin Typ Max UnitsDigital Inputs (OE, SEL0, SEL1)V Low Input Low Voltage Vdd = 2.5 V 0.4VV High Input High Voltage Vdd = 2.5 V 1.3 Vdd = 3.3 V1.6 I IH High Level Input Current 50uAI IL Low Level Input Current -5 5CLKin0/0* and CLKin1/1* Input Clock Specifications, (Note 9, Note 10)I IH High Level Input Current V CLKin = Vdd 20uA I IL Low Level Input Current(Note 8)V CLKin = 0 V-20 uA V IH Input High Voltage Vdd VV ILInput Low VoltageGND V CMDifferential InputCommon Mode Input Voltage(Note 12)V ID = 150 mV0.5 Vdd-1.2VV ID = 350 mV 0.5 Vdd-1.1V ID = 800 mV0.5 Vdd-0.9V ID Differential Input Voltage Swing CLKin driven differentially 0.15 1.5V OSCin/OSCout Pinsf OSCinInput Frequency (Note 7)Single-Ended Input, OSCout floatingDC200MHzf XTALCrystal Frequency Input Range Fundamental Mode Crystal ESR < 200 Ω ( f Xtal ≤ 30 MHz )ESR < 120 Ω ( f Xtal > 30 MHz )(Note 11, Note 7)10 40MHzC OSCinShunt Capacitance1 pFNote 6:AC Parameters for CMOS are dependent upon output capacitive loading Note 7:Guaranteed by characterization.Note 8:V IL should not go below -0.3 volts.Note 9:See Section 12.1 Differential Voltage Measurement Terminology for definition of V ID and V OD .Note 10:Refer to application note AN-912 Common Data Transmission Parameters and their Definitions for more information.Note 11:The ESR requirements stated are what is necessary in order to ensure that the Oscillator circuitry has no start up issues. However, lower ESR values for the crystal might be necessary in order to stay below the maximum power dissipation requirements for that crystal.Note 12:When using differential signals with V CM outside of the acceptable range for the specified V ID , the clock must be AC coupled.LMK00101 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input30146942Iddo per Output vs Frequency50100150200250051015C U R R E N T (m A )FREQUENCY (MHz)Cload = 10 pFVddo = 1.5 V Vddo = 1.8 V Vddo = 2.5 V Vddo = 3.3 V 30146976Note 13:Test conditions: LVCMOS Input, slew rate ≥ 2 V/ns, C L = 5 pF in parallel with 50 6L M K 00101 U l t r a -l o w J i t t e r L V C M O S F a n o u t B u f f e r /L e v e l T r a n s l a t o r w i t h U n i v e r s a l I n p u t12.0 Measurement Definitions12.1 Differential Voltage Measurement TerminologyThe differential voltage of a differential signal can be de-scribed by two different definitions causing confusion when reading datasheets or communicating with other engineers. This section will address the measurement and description of a differential signal so that the reader will be able to under-stand and discern between the two different definitions when used.The first definition used to describe a differential signal is the absolute value of the voltage potential between the inverting and non-inverting signal. The symbol for this first measure-ment is typically VID or VODdepending on if an input or outputvoltage is being described.The second definition used to describe a differential signal is to measure the potential of the non-inverting signal with re-spect to the inverting signal. The symbol for this second measurement is VSSand is a calculated parameter. Nowherein the IC does this signal exist with respect to ground, it onlyexists in reference to its differential pair. VSScan be measured directly by oscilloscopes with floating references, otherwisethis value can be calculated as twice the value of VODas de-scribed in the first sectionFigure 1 illustrates the two different definitions side-by-side for inputs and Figure 2 illustrates the two different definitionsside-by-side for outputs. The VIDand VODdefinitions showVAand VBDC levels that the non-inverting and inverting sig-nals toggle between with respect to ground. VSSinput and output definitions show that if the inverting signal is consid-ered the voltage potential reference, the non-inverting signal voltage potential is now increasing and decreasing above and below the non-inverting reference. Thus the peak-to-peak voltage of the differential signal can be measured.VIDand VODare often defined in volts (V) and VSSis oftendefined as volts peak-to-peak (VPP).30146912FIGURE 1. Two Different Definitions for Differential Input Signals30146913FIGURE 2. Two Different Definitions for Differential Output Signals LMK00101 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input13.0 Functional DescriptionThe LMK00101 is a 10 output LVCMOS clock fanout buffer with low additive jitter that can operate up to 200 MHz. It fea-tures a 3:1 input multiplexer with a crystal oscillator input,single supply or dual supply (lower power) operation, and pin-programmable device configuration. The device is offered in a 32-pin LLP package.13.1 V dd and V ddo Power Supplies (Note 14, Note 15)Separate core and output supplies allow the output buffers to operate at the same supply as the Vdd core supply (3.3 V or 2.5 V) or from a lower supply voltage (3.3 V, 2.5 V, 1.8 V, or 1.5 V). Compared to single-supply operation, dual supply op-eration enables lower power consumption and output-level compatibility.Bank A (CLKout0 to CLKout4) and Bank B (CLKout5 to CLK-out9) may also be operated at different V ddo voltages, provid-ed neither V ddo voltage exceeds V dd .Note 14:Care should be taken to ensure the V ddo voltage does not exceed the Vdd voltage to prevent turning-on the internal ESD protection circuitry.Note 15:DO NOT DISCONNECT OR GROUND ANY OF THE V ddo PINS as the V ddo pins are internally connected within an output bank.13.2 CLOCK INPUTSThe LMK00101 has three different inputs, CLKin0/CLKin0*,CLKin1/CLKin1*, and OSCin that can be driven in different manners that are described in the following sections.13.2.1 SELECTION OF CLOCK INPUTClock input selection is controlled using the SEL0 and SEL1pins as shown in Table 1. Refer to Section 14.1 Driving the Clock Inputs for clock input requirements. When CLKin0 or CLKin1 is selected, the crystal circuit is powered down. When OSCin is selected, the crystal oscillator will start-up and its clock will be distributed to all outputs. Refer to Section 14.2Crystal Interface for more information. Alternatively, OSCin may be driven by a single ended clock, up to 200 MHz, instead of a crystal.TABLE 1. Input SelectionSEL1SEL0Input 00CLKin0, CLKin0*01CLKin1, CLKin1*1XOSCin (Crystal Mode)13.2.1.1 CLKin/CLKin* PinsThe LMK00101 has two differential inputs (CLKin0/CLKin0*and CLKin1/CLKin1*) that can be driven single-ended or dif-ferentially. They can accept AC or DC coupled 3.3V/2.5V LVPECL, LVDS, or other differential and singled ended sig-nals that meet the input requirements under the “CLKin0/0*and CLKin1/1* Input Clock Specifications” portion of the Sec-tion 10.0 El ectrical Characteristics and (Note 12). Refer to Section 14.1 Driving the Clock Inputs for more details on driv-ing the LMK00101 inputs.In the event that a Crystal mode is not selected and the CLKin pins do not have an AC signal applied to them, Table 2 fol-lowing will be the state of the outputs.TABLE 2. CLKinX Input vs. Output States CLKinX CLKinX*Output State Open Open Logic Low Logic Low Logic Low Logic Low Logic High Logic Low Logic High Logic LowLogic HighLogic Low13.3 CLOCK OUTPUTSThe LMK00101 has 10 LVCMOS outputs.13.3.1 Output Enable PinWhen the output enable pin is held High, the outputs are en-abled. When it is held Low, the outputs are held in a Low state as shown in Table 3.TABLE 3. Output Enable Pin StatesOE Outputs Low Disabled (Hi-Z)HighEnabledThe OE pin is synchronized to the input clock to ensure that there are no runt pulses. When OE is changed from Low to High, the outputs will initially have an impedance of about 400 Ω to ground until the second falling edge of the input clock. Starting with the second falling edge of the input clock,the outputs will buffer the input. If the OE pin is taken from Low to High when there is no input clock present, the outputs will either go High or Low and stay a that state; they will not oscillate. When the OE pin is taken from High to Low the out-puts will become Low after the second falling edge of the clock input and then will go to a Disabled (Hi-Z) state starting after the next rising edge.13.3.2 Using Less than Ten OutputsAlthough the LMK00101 has 10 outputs, not all applications will require all of these. In this case, the unused outputs should be left floating with a minimum copper length (Note 16) to minimize capacitance. In this way, this output will con-sume minimal output current because it has no load.Note 16:For best soldering practices, the minimum trace length should extend to include the pin solder mask. This way during reflow, the solder has the same copper area as connected pins. This allows for good, uniform fillet solder joints helping to keep the IC level during reflow. 8L M K 00101 U l t r a -l o w J i t t e r L V C M O S F a n o u t B u f f e r /L e v e l T r a n s l a t o r w i t h U n i v e r s a l I n p u t14.0 Application Information14.1 Driving the Clock InputsThe LMK00101 has two differential inputs (CLKin0/CLKin0*and CLKin1/CLKin1*) that can accept AC or DC coupled 3.3V/2.5V LVPECL, LVDS, and other differential and single ended signals that meet the input requirements specified in Sec-tion 10.0 Electrical Characteristics . The device can accept a wide range of signals due to its wide input common mode voltage range (V CM ) and input voltage swing (V ID )/dynamic range. AC coupling may also be employed to shift the input signal to within the V CM range.To achieve the best possible phase noise and jitter perfor-mance, it is mandatory for the input to have a high slew rate of 2 V/ns (differential) or higher. Driving the input with a lower slew rate will degrade the noise floor and jitter. For this rea-son, a differential input signal is recommended over single-ended because it typically provides higher slew rate and common-mode noise rejection.While it is recommended to drive CLKin0 and CLKin1 with a differential signal input, it is possible to drive them with a sin-gle ended clock. The single-ended input slew rate should be as high as possible to minimize performance degradation.The CLKinX input has an internal bias voltage of about 1.4 V,so the input can be AC coupled as shown in Figure 3, Figure 4, or Figure 5 depending upon the application.30146938FIGURE 3. Single-Ended LVCMOS Input, AC Coupling,Near and Far End Termination30146943FIGURE 4. Single-Ended LVCMOS Input, AC Coupling,Near End Termination30146944FIGURE 5. Single-Ended LVCMOS Input, AC Coupling,Far End Termination A single ended clock may also be DC coupled to CLKinX as shown in Figure 6. If the DC coupled input swing has a com-mon mode level near the devices internal bias of 1.4 V, then only a 0.1 µF bypass cap is required on CLKinX*. Otherwise,if the input swing is not optimally centered near the internal bias voltage, then CLKinX* should be externally biased to the midpoint voltage of the input swing. This can be achieved us-ing external biasing resistors, R B1 and R B2, or another low-noise voltage reference. The external bias voltage should be within the specified input common voltage (VCM) range. This will ensure the input swing crosses the threshold voltage at a point where the input slew rate is the highest.30146939FIGURE 6. Single-Ended LVCMOS Input, DC Couplingwith Common Mode Biasing If the crystal oscillator circuit is not used, it is possible to drive the OSCin input with an single-ended external clock as shown in Figure 7. Configurations similar to Figure 4 or Figure 5 could also be used as long as the OSCout pin is left floating. The input clock should be AC coupled to the OSCin pin, which has an internally generated input bias voltage, and the OSCout pin should be left floating. While OSCin provides an alterna-tive input to multiplex an external clock, it is recommended to use either differential input (CLKinX) since it offers higher op-erating frequency, better common mode, improved power supply noise rejection, and greater performance over supply voltage and temperature variations.LMK00101 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input30146903FIGURE 7. Driving OSCin with a Single-Ended ExternalClock 14.2 Crystal InterfaceThe LMK00101 has an integrated crystal oscillator circuit that supports a fundamental mode, AT-cut crystal. The crystal in-terface is shown in Figure 8.30146904FIGURE 8. Crystal InterfaceThe load capacitance (C L ) is specific to the crystal, but usually on the order of 18 to 20 pF. While C L is specified for the crys-tal, the OSCin input capacitance (C IN = 1 pF typical) of the device and PCB stray capacitance (C STRAY ~ 1 to 3 pF) can affect the discrete load capacitor values, C 1 and C 2. For the parallel resonant circuit, the discrete capacitor values can be calculated as follows:C L = (C 1 * C 2) / (C 1 + C 2) + C IN + C STRAY(1)Typically, C 1 = C 2 for optimum symmetry, so Equation 1 can be rewritten in terms of C 1only:C L = C 12 / (2 * C 1 ) + C IN + C STRAY(2)Finally, solve for C 1:C 1 = (C L - C IN - C STRAY ) * 2(3)Section 10.0 Electrical Characteristics provides crystal inter-face specifications with conditions that ensure start-up of the crystal, but it does not specify crystal power dissipation. The designer will need to ensure the crystal power dissipation does not exceed the maximum drive level specified by the crystal manufacturer. Overdriving the crystal can cause pre-mature aging, frequency shift, and eventual failure. Drive level should be held at a sufficient level necessary to start-up and maintain steady-state operation.The power dissipated in the crystal, P XTAL , can be computed by:P XTAL = I RMS 2 * R ESR * (1 + C 0 / C L )2(4)Where:•I RMS is the RMS current through the crystal.•R ESR is the maximum equivalent series resistance specified for the crystal.•C L is the load capacitance specified for the crystal.•C 0 is the minimum shunt capacitance specified for the crystal.I RMS can be measured using a current probe (e.g. Tektronix CT-6 or equivalent) placed on the leg of the crystal connected to OSCout with the oscillation circuit active.As shown in Figure 8, an external resistor, R LIM , can be used to limit the crystal drive level if necessary. If the power dissi-pated in the selected crystal is higher than the drive level specified for the crystal with R LIM shorted, then a larger resis-tor value is mandatory to avoid overdriving the crystal. How-ever, if the power dissipated in the crystal is less than the drive level with R LIM shorted, then a zero value for R LIM can be used.As a starting point, a suggested value for R LIM is 1.5 k Ω14.3 Power Supply Ripple RejectionIn practical system applications, power supply noise (ripple)can be generated from switching power supplies, digital ASICs or FPGAs, etc. While power supply bypassing will help filter out some of this noise, it is important to understand the effect of power supply ripple on the device performance.When a single-tone sinusoidal signal is applied to the power supply of a clock distribution device, such as LMK00101, it can produce narrow-band phase modulation as well as am-plitude modulation on the clock output (carrier). In the single-side band phase noise spectrum, the ripple-induced phase modulation appears as a phase spur level relative to the car-rier (measured in dBc).For the LMK00101, power supply ripple rejection (PSRR),was measured as the single-sideband phase spur level (in dBc) modulated onto the clock output when a ripple signal was injected onto the V ddo supply. The PSRR test setup is shown in Figure 9.30146940FIGURE 9. PSRR Test SetupA signal generator was used to inject a sinusoidal signal onto the V ddo supply of the DUT board, and the peak-to-peak ripple amplitude was measured at the V ddo pins of the device. A lim-iting amplifier was used to remove amplitude modulation on the differential output clock and convert it to a single-ended signal for the phase noise analyzer. The phase spur level measurements were taken for clock frequencies of 100 MHz under the following power supply ripple conditions:•Ripple amplitude: 100 mVpp on V ddo = 2.5 V •Ripple frequency: 100 kHzAssuming no amplitude modulation effects and small index modulation, the peak-to-peak deterministic jitter (DJ) can be calculated using the measured single-sideband phase spur level (PSRR) as follows:10L M K 00101 U l t r a -l o w J i t t e r L V C M O S F a n o u t B u f f e r /L e v e l T r a n s l a t o r w i t h U n i v e r s a l I n p u t分销商库存信息:NATIONAL-SEMICONDUCTORLMK00101SQX/NOPB LMK00101SQ/NOPB LMK00101SQE/NOPB LMK00101BEVAL/NOPB。

FeaturesÎÎSPDT (10x) Switch Type and Signal Type Support D-PHY andC-PHY ÎÎData Rate: D-PHY(2.5Gbps) 4-Data Lane and C-PHY (2.5Gsps) 3-Data LaneÎÎSupports 2:1 Clock Differential SignalÎÎ-3dB Bandwidth: 4.5GHz TypicalÎÎLowCrosstalk:*************ÎÎLowOffIsolation:*************ÎÎInput Signals 0 to 1.3V ÎÎR ON : 6Ω Typical LP & HS MIPI ÎÎ∆R ON : 0.1Ω Typical LP & HS MIPI ÎÎR ON _FLAT : 0.3Ω Typical LP & HS MIPI ÎÎI CCZ : 1μA Maximum ÎÎI CC : 15μA Typical ÎÎC ON : 1.5pF TypicalÎÎSkew of Opposite Transitions of the Same Output: 2ps Typical ÎÎV DD Operating Range: 1.5V to 5V ÎÎESD Tolerance: 2kV HBMÎÎTotally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)ÎÎHalogen and Antimony Free. “Green” Device (Note 3)ÎÎFor automotive applications requiring specific changecontrol (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https:///quality/product-definitions/ÎÎPackaging (Pb-free & Green): 36-Pin, CSP (GE) 2.44 × 2.44DescriptionDiodes' PI 3WVR646 is a 4-data lane D-PHY or 3−data lane C−PHY M I P I switch. This 10-channel single-pole, double-throw (SPDT) switch is optimized for switching between high-speed (HS) or low-power (LP) MIPI signal. The PI3WVR646 is designed for the MIPI specification and allows connection to a CSI or DSI module.ApplicationsÎÎCellular Phones, Smart Phones ÎÎTablets ÎÎLaptops ÎÎDisplays2:1 MIPI D-PHY and C-PHY SwitchA product Line of Diodes IncorporatedPI3WVR646Lead-free GreenNotes:1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.2. See https:///quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.PI3WVR646Block DiagramPI3WVR646 D-PHY ApplicationPI3WVR646 C-PHY ApplicationPI3WVR646 Block DiagramTruth TableSEL OE FunctionLOW LOW CLK+ = CLKA+, CLK- = CLKA-, Dn(±) = DAn(±)HIGH LOW CLK+ = CLKB+, CLK- = CLKB-, Dn(±) = DBn(±)X HIGH Clock and Data Ports High ImpedancePI3WVR646Pin DescriptionPin#Pin NameTypeDescriptionA1V CC Power 1.5V to 5V power supply A2GND Ground GroundA3DA4-I/O Negative differential signal 4 for port A A4DA4+I/O Positive differential signal 4 for port AA5OE I Output enable.If OE is low, IC enables. If OE is high, IC powers down. All I/Os are Hi-Z.A6SEL I/O Switch logic controlB1DB4-I/O Negative differential signal 4 for port B B2DB4+I/O Positive differential signal 4 for port B B3DA3-I/O Negative differential signal 3 for port A B4DA3+I/O Positive differential signal 3 for port A B5D4-I/O Negative differential signal 4 for COM port B6D4+I/O Positive differential signal 4 for COM port C1DB3-I/O Negative differential signal 3 for port B C2DB3+I/O Positive differential signal 3 for port B C3, C4NC—Not connectedC5D3-I/O Negative differential signal 3 for COM port C6D3+I/O Positive differential signal 3 for COM port D1DB2-I/ONegative differential signal 2 for port BPin Configuration (Top View)A B C D E F123456V CCCLKB-CLKB+DB4+GNDDA4-DA4+OESELDB4-DA3-DA3+D4-D4+DB3+DB3-NC NC D3-D3+DB2+DB2-DA2-DA2+D2-D2+DB1+DB1-DA1-DA1+D1-D1+CLKA-CLKA+CLK-CLK+PI3WVR646 Pin Description Cont.Pin#Pin Name Type DescriptionD2DB2+I/O Positive differential signal 2 for port BD3DA2-I/O Negative differential signal 2 for port AD4DA2+I/O Positive differential signal 2 for port AD5D2-I/O Negative differential signal 2 for COM portD6D2+I/O Positive differential signal 2 for COM portE1DB1-I/O Negative differential signal 1 for port BE2DB1+I/O Positive differential signal 1 for port BE3DA1-I/O Negative differential signal 1 for port AE4DA1+I/O Positive differential signal 1 for port AE5D1-I/O Negative differential signal 1 for COM portE6D1+I/O Positive differential signal 1 for COM portF1CLKB-I/O Clock negative differential signal for port BF2CLKB+I/O Clock positive differential signal for port BF3CLKA-I/O Clock negative differential signal for port AF4CLKA+I/O Clock positive differential signal for port AF5CLK-I/O Clock negative differential signal for COM portF6CLK+I/O Clock positive differential signal for COM portPI3WVR646V CC, Supply Voltage, ................................................................-0.5V to 6.0V V CNTRL, DC Input Voltage (OE, SEL)(1)..................................-0.5V to V CC V SW, DC Switch I/O Voltage(1,2)...............................................-0.3V to 4.0V I IK, DC Input Diodes Current ...........................................................-50mA I OUT, DC Output Current .....................................................................25mA T STG, Storage Temperature .................................................-65°C to +150°C Tj, Junction Temperature ......................................................................125°C ESD:Human Body Model, JEDEC: JESD22-A114, All Pins ....................2.0kV Charged Device Model, JEDEC: JESD22-C101................................1.0kV Note:Stresses greater than those listed under MAXIMUM RAT-INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for ex-tended periods may affect reliability.Absolute Maximum Ratings(Above which useful life may be impaired. For user guidelines, not tested.)1. The input and output negative ratings can be exceeded if the input and output diode current ratings are observed.2. V SW refers to analog data switch paths.Recommended Operating ConditionsThe Recommended Operating Conditions table defines the conditions for actual device operation.Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Symbol Description Test Conditions Min.Max.Units V CC Supply Voltage— 1.5 5.0V V CNTRL Control Input Voltage (SEL, OE)(1)—0V CC VV SW Switch I/O Voltage (CLK-, D-, CLKA-, CLKB-, DA-, DB-)- HS Mode00.5V - LP Mode0 1.3VT A Operating Temperature—-40+85°C Note:1. The control inputs must be held HIGH or LOW; they must not float.DC and Transient CharacteristicsAll typical values are at T A = 25°C unless otherwise specified.Symbol Description Test Conditions V CC (V)T A = -40°C to +85°CUnits Min.Typ.Max.V IK Clamp Diode Voltage (OE, SEL)I IN = -18mA 1.5-1.2—-0.6V V IH Input Voltage High SEL, OE 1.5 to 5 1.3——V V IL Input Voltage Low SEL, OE 1.5 to 5——0.5V I IN Control Input Leakage (OE, SEL)V CNTRL = 0 to V CC5-0.50.5μAI NO(OFF) I NC(OFF)Off Leakage Current of Port CLKA-,DA-, CLKB- and DB-V SW = 0.0 ≤ DATA ≤ 1.3V5-0.5—0.5μAI A(ON)On Leakage Current of CommonPorts (CLK-, D-)V SW = 0.0 ≤ DATA ≤ 1.3V5-0.5—0.5μAPI3WVR646Symbol Description Test Conditions V CC (V)T A = -40°C to +85°CUnits Min.Typ.Max.I OFF Power-Off Leakage Current(All I/O Ports)V SW = 0.0 or 1.3V0-0.5—0.5μAI OZ Off-State Leakage V SW = 0.0 ≤ DATA ≤ 1.3V,OE = High5-0.5—0.5μAR ON_MIPI_HS Switch On Resistance for HS MIPI I ON = -8mA, OE = 0V,SEL = V CC or 0V, CLKA,CLKB, DB- or DA- = 0.2V1.5—69Ω2.53.35R ON_MIPI_LP Switch On Resistance for LP MIPI I ON = -8mA, OE = 0V,SEL = V CC or 0V, CLKA,CLKB, DB- or DA- = 1.2V1.5—69Ω2.53.35∆R ON_MIPI_HS On Resistance Matching BetweenHS MIPI Channels(1)I ON = -8mA, OE = 0V,SEL = V CC or 0V, CLKA,CLKB, DB- or DA- = 0.2V1.5—0.1—Ω2.53.35∆R ON_MIPI_LP On Resistance Matching BetweenLP MIPI Channels(1)I ON = -8mA, OE = 0V,SEL = V CC or 0V,CLKA, CLKB,DB- or DA- = 1.2V1.5—0.1—Ω2.53.35R ON_FLAT_ MIPI_HS On Resistance Flatness for HS MIPII ON = -8mA, OE = 0V,SEL = V CC or 0V, CLKA,CLKB, DB- or DA- = 0 to0.3V1.5—0.3—Ω2.53.35R ON_FLAT_ MIPI_LP On Resistance Flatness for LP MIPII ON = -8mA, OE = 0V,SEL = V CC or 0V, CLKA,CLKB, DB- or DA- = 0 to1.3V1.5—0.3—Ω2.53.35I CC Quiescent Supply Current V SEL = 0 or V CC, I OUT = 0,OE = 0V5—1530μAI CCZ Quiescent Supply Current(High Impedance)V SEL = 0 or V CC, I OUT = 0,OE = 0V5——1μAI CCT Increase in I CC Current Per ControlVoltage and V CC V SEL = 0 or V CC,OE = 1.5V5—1—μADC and Transient Characteristics Cont.PI3WVR646AC Electrical CharacteristicsAll typical values are for V CC = 3.3V and T A = 25°C unless otherwise specified.Symbol Description Test Conditions V CC (V)T A = -40°C to +85°CUnits Min.Typ.Max.t INIT Initialization Time V CC to Output(1)R L = 50Ω, C L = 0pF,V SW = 0.6V1.5 to 5—60—μst EN Enable Time OE to Output R L = 50Ω, C L = 0pF,V SW = 0.6V1.5 to 5—60150μst DIS Disable Time OE to Output R L = 50Ω, C L = 0pF,V SW = 0.6V1.5 to 5—35250nst ON Turn-On Time SEL to Output R L = 50Ω, C L = 0pF,V SW = 0.6V 1.5 to 5—3501100nst OFF Turn-Off Time SEL to Output R L = 50Ω, C L = 0pF,V SW = 0.6V 1.5 to 5—125800nst BBM Break-Before-Make Time R L = 50Ω, C L = 0pF,V SW = 0.6V 1.5 to 5——450ns t PD Propagation Delay(1)C L = 0pF, R L = 50Ω 1.5 to 5——0.25nsO IRR Off Isolation for MIPI(1)R L = 50Ω, f = 1250MHz,OE = HIGH,V SW = 0.2V PP1.5 to 5—-26—dBX TALK Crosstalk for MIPI(1)R L = 50Ω, f = 1250MHz,SEL = HIGH,V SW = 0.2V PP 1.5 to 5——-30dB R L = 50Ω, f = 1250MHz,SEL = LOW, V SW = 0.2V PP——-30I LOSS Insertion Loss(1)R L = 50Ω, C L = 0pF,f = 1250MHz,V SW = 0.2V PP1.5 to 5—-0.9—dB R L = 50Ω, C L = 0pF,f = 750MHz,V SW = 0.2V PP1.5 to 5—-0.7—BW-3db Bandwidth(1)R L = 50Ω, C L = 0pF,V SW = 0.2V PP 1.5 to 5 3.0 4.5—GHzNote:1. Guaranteed by characterization.PI3WVR646CapacitanceSymbolDescription Test Conditions T A = -40°C to +85°CUnitsMin.Typ.Max.C IN Control Pin Input Capacitance (1)V CC = 0V, f = 1MHz — 2.1—pF C ON On Capacitance (1)V CC = 3.3V, OE = 0V, f = 1250MHz (in HS common value)— 1.5—pF C OFFOff Capacitance (1)V CC or OE = 3.3V, f = 1250MHz (both sides in HS common value)—0.9—pFNote:1. Guaranteed by characterization.High-Speed-Related AC Electrical CharacteristicsSymbolDescriptionTest ConditionsV CC (V)T A = -40°C to +85°CUnitsMin.Typ.Max.t SK(P)HS Mode Skew of Opposite Transitions of the Same Output (1)R L = 50Ω, C L = 0pF, V SW = 0.3V 1.5 to 5—24psHS Mode Slew of all Group A or Group B Channels (1)R L = 50Ω, C L = 0pF, V SW = 0.3V1.5 to 5—47Note:1. Guaranteed by characterization.PI3WVR646Test Circuit for Dynamic Electrical CharacteristicsNetwork Analyzer300kHz-20GHzPORT 1PORT 2PORT 3PORT 4DUTPI3WVR646Test Circuit for Electrical Characteristics (1-4)1. C L = Load capacitance: includes jig and probe capacitance.2. R T = Termination resistance: should be equal to Z OUT of the Pulse Generator.3. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, Z O = 50Ω, t R ≤ 2.5ns, t F ≤ 2.5ns.4. The outputs are measured one at a time with one transition per measurement.Test ConditionOutput 1 Test ConditionOutput 2 Test ConditionPA = Low PA = High PB = HighPB = LowPart MarkingZ: Die Rev YY: YearWW: Workweek1st X: Assembly Site Code 2nd X: Fab Site CodePI3WVR646Ordering InformationOrdering CodePackage CodePackage DescriptionPI3WVR646GEEXGE36-Pin, 2.44×2.44, Wafer Level (CSP)Notes:1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.2. See https:///quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and A ntimony-free, "Green" and Lead-free.3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.4. E = Pb-free and Green5. X suffix = Tape/ReelFor latest package information:See /design/support/packaging/pericom-packaging/packaging-mechanicals-and-thermal-characteristics/.PI3WVR646IMPORTANT NOTICEDIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further no-tice to this document and any product described herein. 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Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages.Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks.This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determi-native format released by Diodes Incorporated.LIFE SUPPORTDiodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:A. Life support devices or systems are devices or systems which:1. are intended to implant into the body, or2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user.B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause thefailure of the life support device or to affect its safety or effectiveness.Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.Copyright © 2019, Diodes Incorporated。

© 2009 Microchip Technology Inc.DS80437B-page 1PIC18F1XK22/LF1XK22The PIC18F1XK22/LF1XK22 family devices that you have received conform functionally to the current Device Data Sheet (DS41365B ), except for the anomalies described in this document.The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in Table 1. The silicon issues are summarized in T able 2.The errata described in this document will be addressed in future revisions of the PIC18F1XK22/LF1XK22silicon.Data Sheet clarifications and corrections start on page 6,following the discussion of silicon issues.The silicon revision level can be identified using the current version of MPLAB ® IDE and Microchip’s programmers, debuggers, and emulation tools, which are available at the Microchip corporate web site ().For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2 or PICkit™ 3:1.Using the appropriate interface, connect the device to the MPLAB ICD 2 programmer/debugger or PICkit™ 3.2.From the main menu in MPLAB IDE, select Configure>Select Device , and then select the target part number in the dialog box.3.Select the MPLAB hardware tool (Debugger>Select Tool ).4.Perform a “Connect” operation to the device (Debugger>Connect ). Depending on the development tool used, the part number and Device Revision ID value appear in the Output window.The DEVREV values for the various PIC18F1XK22/LF1XK22 silicon revisions are shown in Table 1.Note:This document summarizes all silicon errata issues from all revisions of silicon,previous as well as current.Note:If you are unable to extract the silicon revision level, please contact your local Microchip sales office for assistance.TABLE 1:SILICON DEVREV VALUESPart NumberDevice ID Revision ID for Silicon Revision (1)A1A2A3PIC18F14K224F20h 01h 02h 03h PIC18F13K224F40h 01h 02h 03h PIC18LF14K224F60h 01h 02h 03h PIC18LF13K224F80h01h02h03hNote 1:The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses in program memory. They are shown in hexadecimal in the format “DEVID:DEVREF”.2:Refer to the “PIC18F1XK22/LF1XK22 Flash Memory Programming Specification” (DS41357) for detailed information on Device and Revision IDs for your specific device.PIC18F1XK22/LF1XK22 Family Silicon Errata and Data Sheet ClarificationPIC18F1XK22/LF1XK22DS80437B-page 2© 2009 Microchip Technology Inc.TABLE 2:SILICON ISSUE SUMMARYSilicon Errata Issues1.Module:ADC (Analog-to-DigitalConverter)ADC conversion on AN3/OSC2 will have large INL error up to approximately 8LSb.Work aroundNone for the AN3 pin. For better accuracy, use another analog pin.Affected Silicon Revisions 2.Module:ECCP2.1Changing direction in Full-Bridge mode inserts a dead band time of 4/F OSC *TMR2prescale instead of 1/F OSC *TMR2 prescale as specified in the data sheet.Work around None.Affected Silicon Revisions 2.2In Full-Bridge mode, when PR2=CCPR1L,DC1B<1:0> = 00, and the direction is changed, then the dead time before the modulated output starts is compromised.The modulated signal improperly starts immediately with the direction change and stays on for T OSC *TMR2Presale *DC1B<1:0>.Work aroundAvoid changing direction when the duty cycle is within three least significant steps of 100% duty cycle. Instead, clear the DC1B<1:0> bits before the direction change and then set them to the desired value after the direction change is complete.Affected Silicon Revisions 3.Module:EUSART3.1In Asynchronous Receive mode, the RCIDL bit of the BAUDCON register will properly go low when a low pulse greater than 1/16th of a bit time is received on the RX input. The RCIDL bit will then improperly go high if a low pulse less than 1/16 bit time occurs on the RX input within one bit period after the falling edge of the first pulse. This erratum affects only users monitoring the RCIDL bit as a part of their serial protocol.Module Feature Item Number Issue SummaryAffected Revisions (1)A1A2A3ADC ADC Conversion rge INL error on AN3.X X X ECCP Full Bridge mode2.Delay time with direction change.X X X EUSART — 3.RCIDL bit, clearing the OERR flag, and RX pin.X X X MSSP —4.I 2C™ mode and SPI mode.X XXOscillator LP Osc. 5.Osc. switching and LP Osc. fails at hot.X V REF CV REF output6.RC2 disabled.X ICSP™—7.ICSP works only at V DD >2V.X X X Internal Oscillator —8.Frequency tolerance.XXXNote 1:Only those issues indicated in the last column apply to the current silicon revision.Note:This document summarizes all silicon errata issues from all revisions of silicon,previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision (A1).A1A2A3XXXA1A2A3XXXA1A2A3XXXPIC18F1XK22/LF1XK22Work aroundNone.Affected Silicon Revisions3.2The OERR flag of the RCSTA register isreset only by either clearing the CREN bit ofthe RCSTA register or by a device Reset.Clearing the SPEN bit of the RCSTA registerdoes not clear the OERR flag.Work aroundClear the OERR flag by clearing the CRENbit in lieu of clearing the SPEN bit.Affected Silicon Revisions3.3When the SPEN bit of the RCSTA register isset and the CREN bit of the RCSTA registeris clear, the RX pin is not available for gen-eral purpose output. Likewise, when theSPEN bit of the RCSTA register is set andthe TXEN bit of the TXSTA register is clear,the TX pin is not available for general pur-pose output. However, both the RX and TXpins can be read regardless of the state ofthe RCSTA and TXSTA control registers.Work aroundNone.Affected Silicon Revisions4.Module:MSSP (Master SynchronousSerial Port)4.1In I2C™ Master mode, baud rates obtainedby setting SSPADD to a value less than 0x03will cause unexpected operation.Work aroundEnsure SSPADD is set to a value greaterthan or equal to 0x03.Affected Silicon Revisions 4.2In SPI Master mode, when the CKE bit iscleared and the SMP bit is set, the last bit ofthe incoming data stream (bit 0) at the SDIpin will not be sampled properly.Work aroundNone.Affected Silicon Revisions4.3When SPI is enabled in Master mode withCKE=1 and CKP=0, a 1/F OSC wide pulsewill occur on the SCK pin.Work aroundConfigure the SCK pin as an input until afterthe MSSP is setup.Affected Silicon Revisions4.4I2C Master mode, SSPADD values of 0x00,0x01, 0x02 are invalid. The current I2C BaudRate Generator (BSG) is not set up togenerate a clock signal for these values.Work aroundNone.Affected Silicon Revisions4.5I2C Master mode, RCEN bit not cleared byhardware if improper Stop is received on thebus.Work aroundReset the module via clearing and settingthe SSPEN bit of SSPCON1.Affected Silicon RevisionsA1A2A3 X X XA1A2A3 X X XA1A2A3 X X XA1A2A3 X X X A1A2A3 X X XA1A2A3 X X XA1A2A3 X X XA1A2A3 X X X© 2009 Microchip Technology Inc.DS80437B-page 3PIC18F1XK22/LF1XK22DS80437B-page 4© 2009 Microchip Technology Inc.4.6SPI Master mode, when the SPI clock is configured for Timer2/2(SSPCON1<3:0>=0011), the first SPI high time may be short.Work around None.Option 1: Ensure TMR2 value rolls over tozero immediately before writing to SSPBUF.Option 2: Turn Timer2 off and clear TMR2before writing SSPBUF. Enable TMR2 after SSPBUF is written.Affected Silicon Revisions 4.7In any SPI Master mode, SCK =TMR2/2; if SSPBUF is written to while shifting out data,a ninth SCK pulse is incorrectly generated.At that point, the module locks user from writ-ing to the SSPBUF register, but a write attempt will still cause 8 or 9 more SCK pulses to be generated.Work aroundThe WCOL bit of the SSPCON register is correctly set to indicate that there was a write collision. Any time this bit is set the module must be disabled and enabled (toggle SSPEN) to return to correct operation. The bus will remain out of synchronization.Affected Silicon Revisions .5.Module:Oscillator5.1Disabling the Primary External Oscillator circuitry (PRI_SD = 1) immediately following a change in system clock from external LP oscillator to the internal oscillator will halt code execution indefinitely.Work aroundAfter changing from external LP oscillator to the internal oscillator, allow at least two instruction cycles before disabling the Primary External Oscillator circuitry.Affected Silicon Revisions 5.2The external LP Oscillator could fail operation at temperatures above 100degrees Celsius.Work around None.Affected Silicon Revisions 6.Module:Programmable VoltageReferenceThe V REF voltage reference can be output to the device CV REF pin by setting the DAC1OE bit of the VREFCON1 register to ‘1’. When the CV REF pin is enabled, pin RC2 is incorrectly set to Analog mode. The digital output buffer and digital input threshold detector functions of that pin are disabled.Work aroundPin RC2 may only be used for analog functions when the voltage reference output is enabled on the CV REF pin. Ensure that the TRIS bit for pin RA0 is set to ‘1’ for proper operation of the CV REF output.Affected Silicon Revisions 7.Module:In-Circuit Serial Programming™(ICSP™)The device cannot be programmed using ICSP when the device V DD is less than 2.0 volts.Work aroundEnsure that the device voltage is 2.0 volts or higher when programming the device.Affected Silicon Revisions A1A2A3X XXA1A2A3XXXA1A2A3XA1A2A3XA1A2A3XA1A2A3XXXPIC18F1XK22/LF1XK228.Module: Internal OscillatorThe frequency tolerance of the HFINTOSC inter-nal oscillator is +2% to -2.5% from 0-85°C.Work aroundNone.Affected Silicon RevisionsA1A2A3X X X© 2009 Microchip Technology Inc.DS80437B-page 5PIC18F1XK22/LF1XK22DS80437B-page 6© 2009 Microchip Technology Inc.Data Sheet ClarificationsThe following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS41365B ).1.Module: Electrical SpecificationsIn Table 25-10 Comparator Specifications of the data sheet (DS41365B ), the Input Offset Voltage should be +/-50mV in High-Power mode and +/-80mV in Low-Power mode as shown below.TABLE 25-10:COMPARATOR SPECIFICATIONS2.Module:Device OverviewIn Table 1-2, PIC18F1XK22/LF1XK22 Pin Sum-mary of the data sheet (DS41365B ), under pin name RA2, the Buffer Type should be ‘ST ’.Note:Corrections are shown in bold . Where possible, the original bold text formatting has been removed for clarity.Operating Conditions: 1.8V < V DD < 5.5V, -40°C < T A < +125°C (unless otherwise stated).Param No.Sym.CharacteristicsMin.Typ. Max.UnitsComments CM01V IOFF Input Offset Voltage—±7.5±50 mV High-Power mode ——±80 mV Low-Power modeCM02V ICM Input Common Mode Voltage 0—V DD V CM03CMRR Common Mode Rejection Ratio 55——dB CM04T RESP Response Time—150400ns Note 1CM05T MC 2OVComparator Mode Change to Output Valid*——10μs*These parameters are characterized but not tested.Note 1:Response time measured with one comparator input at V DD /2, while the other input transitions from V SS to V DD .PIC18F1XK22/LF1XK22 APPENDIX A:DOCUMENTREVISION HISTORYRev. A Document (3/2009)Initial release of this document.Rev. B Document (5/2009)Revised Table 1; Added Table 2; Added Module 8:Internal Oscillator.Added Data Sheet Clarifications Module 1: ElectricalSpecifications and Module 2: Device Overview.© 2009 Microchip Technology Inc.DS80437B-page 7PIC18F1XK22/LF1XK22NOTES:DS80437B-page 8© 2009 Microchip Technology Inc.© 2009 Microchip Technology Inc.DS80437B-page 9Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications.MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY , PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.TrademarksThe Microchip name and logo, the Microchip logo, dsPIC, K EE L OQ , K EE L OQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV , MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, , dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP , ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP , Omniscient Code Generation, PICC, PICC-18, PICkit,PICDEM, , PICtail, PIC 32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.All other trademarks mentioned herein are property of their respective companies.© 2009, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.Printed on recycled paper.Note the following details of the code protection feature on Microchip devices:•Microchip products meet the specification contained in their particular Microchip Data Sheet.•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to ourknowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.•Microchip is willing to work with the customer who is concerned about the integrity of their code.•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC ® DSCs, K EE L OQ ® code hoppingdevices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.AMERICASCorporate Office2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200Fax: 480-792-7277 Technical Support: Web Address: AtlantaDuluth, GATel: 678-957-9614Fax: 678-957-1455BostonWestborough, MATel: 774-760-0087Fax: 774-760-0088 ChicagoItasca, ILTel: 630-285-0071Fax: 630-285-0075 Cleveland Independence, OHTel: 216-447-0464Fax: 216-447-0643DallasAddison, TXTel: 972-818-7423Fax: 972-818-2924DetroitFarmington Hills, MITel: 248-538-2250Fax: 248-538-2260 KokomoKokomo, INTel: 765-864-8360Fax: 765-864-8387Los AngelesMission Viejo, CATel: 949-462-9523Fax: 949-462-9608Santa ClaraSanta Clara, CATel: 408-961-6444Fax: 408-961-6445 TorontoMississauga, Ontario, CanadaTel: 905-673-0699Fax: 905-673-6509ASIA/PACIFICAsia Pacific OfficeSuites 3707-14, 37th FloorTower 6, The GatewayHarbour City, KowloonHong KongTel: 852-2401-1200Fax: 852-2401-3431Australia - SydneyTel: 61-2-9868-6733Fax: 61-2-9868-6755China - BeijingTel: 86-10-8528-2100Fax: 86-10-8528-2104China - ChengduTel: 86-28-8665-5511Fax: 86-28-8665-7889China - Hong Kong SARTel: 852-2401-1200Fax: 852-2401-3431China - NanjingTel: 86-25-8473-2460Fax: 86-25-8473-2470China - QingdaoTel: 86-532-8502-7355Fax: 86-532-8502-7205China - ShanghaiTel: 86-21-5407-5533Fax: 86-21-5407-5066China - ShenyangTel: 86-24-2334-2829Fax: 86-24-2334-2393China - ShenzhenTel: 86-755-8203-2660Fax: 86-755-8203-1760China - WuhanTel: 86-27-5980-5300Fax: 86-27-5980-5118China - XiamenTel: 86-592-2388138Fax: 86-592-2388130China - XianTel: 86-29-8833-7252Fax: 86-29-8833-7256China - ZhuhaiTel: 86-756-3210040Fax: 86-756-3210049ASIA/PACIFICIndia - BangaloreTel: 91-80-3090-4444Fax: 91-80-3090-4080India - New DelhiTel: 91-11-4160-8631Fax: 91-11-4160-8632India - PuneTel: 91-20-2566-1512Fax: 91-20-2566-1513Japan - YokohamaTel: 81-45-471- 6166Fax: 81-45-471-6122Korea - DaeguTel: 82-53-744-4301Fax: 82-53-744-4302Korea - SeoulTel: 82-2-554-7200Fax: 82-2-558-5932 or82-2-558-5934Malaysia - Kuala LumpurTel: 60-3-6201-9857Fax: 60-3-6201-9859Malaysia - PenangTel: 60-4-227-8870Fax: 60-4-227-4068Philippines - ManilaTel: 63-2-634-9065Fax: 63-2-634-9069SingaporeTel: 65-6334-8870Fax: 65-6334-8850Taiwan - Hsin ChuTel: 886-3-6578-300Fax: 886-3-6578-370Taiwan - KaohsiungTel: 886-7-536-4818Fax: 886-7-536-4803Taiwan - TaipeiTel: 886-2-2500-6610Fax: 886-2-2508-0102Thailand - BangkokTel: 66-2-694-1351Fax: 66-2-694-1350EUROPEAustria - WelsTel: 43-7242-2244-39Fax: 43-7242-2244-393Denmark - CopenhagenTel: 45-4450-2828Fax: 45-4485-2829France - ParisTel: 33-1-69-53-63-20Fax: 33-1-69-30-90-79Germany - MunichTel: 49-89-627-144-0Fax: 49-89-627-144-44Italy - MilanTel: 39-0331-742611Fax: 39-0331-466781Netherlands - DrunenTel: 31-416-690399Fax: 31-416-690340Spain - MadridTel: 34-91-708-08-90Fax: 34-91-708-08-91UK - WokinghamTel: 44-118-921-5869Fax: 44-118-921-5820 W ORLDWIDE S ALES AND S ERVICE03/26/09DS80437B-page 10© 2009 Microchip Technology Inc.。

7WBD33062-Bit Translating Bus SwitchThe 7WBD3306 is an advanced high−speed low−power 2−bit translating bus switch in ultra−small footprints.Features•High Speed: t PD= 0.25 ns (Max) @ V CC = 4.5 V•3 W Switch Connection Between 2 Ports•Power Down Protection Provided on Inputs•Zero Bounce•TTL−Compatible Control Inputs•Ultra−Small Pb−Free Packages•These are Pb−Free DevicesThis document contains information on some products that are still under development. ON Semiconductor reserves the right to change or discontinue these products without notice.See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.ORDERING INFORMATIONMARKINGDIAGRAMSULLGA81.45 x 1.0CASE 613AAULLGA81.6 x 1.0CASE 613ABULLGA81.95 x 1.0CASE 613AC5MGAPMGAPMGUDFN8MU SUFFIXCASE 517AJAHMGAH M*GG1UQFN8MU SUFFIXCASE 523ANUS8US SUFFIXCASE 493(Note: Microdot may be in either location)*Date Code orientation may vary dependingupon manufacturing location.Micro8]DM SUFFIXCASE 846AA= Assembly LocationY= YearW= Work WeekM= Date CodeG= Pb−Free PackageTSSOP8DT SUFFIXCASE 948ALAAEYWWAG18OE11V CC A1GND 2387645B1OE2B2A2Figure 1. ULLGA8/UDFN8(Top Thru −View)Figure 2. UQFN8(Top Thru −View)OE2B2A2A1B1V CCGNDFigure 3. US8/Micro8/TSSOP8(Top View)OE1A1GNDB1V CC OE2B2A2OE1Figure 4. Logic DiagramA1OE1B1A2OE2B2FUNCTION TABLEInput OEnFunction LBn = An HDisconnectMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage−0.5 to +7.0V V IN Control Pin Input Voltage−0.5 to +7.0V V I/O Switch Input / Output Voltage−0.5 to +7.0VI IK Control Pin DC Input Diode Current V IN < GND−50mAI OK Switch I/O Port DC Diode Current V I/O < GND−50mAI O ON−State Switch Current$128mAContinuous Current Through V CC or GND$150mAI CC DC Supply Current Per Supply Pin$150mAI GND DC Ground Current per Ground Pin$150mAT STG Storage Temperature Range−65 to +150°C T L Lead Temperature, 1 mm from Case for 10 Seconds260°C T J Junction Temperature Under Bias150°Cq JA Thermal Resistance US8 (Note 1)UDFN8UQFN8ULLGA8Micro8TSSOP8251111208455392150°C/WP D Power Dissipation in Still Air at 85°C US8UDFN8UQFN8ULLGA8Micro8TSSOP84981127601274319833mWMSL Moisture Sensitivity Level 1F R Flammability Rating Oxygen Index: 28 to 34UL 94 V−0 @ 0.125 inV ESD ESD Withstand Voltage Human Body Mode (Note 2)Machine Model (Note 3)Charged Device Model (Note 4)> 2000> 200N/AVI LATCHUP Latchup Performance Above V CC and Below GND at 125°C (Note 5)$200mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.1.Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.2.Tested to EIA / JESD22−A114−A.3.Tested to EIA / JESD22−A115−A.4.Tested to JESD22−C101−A.5.Tested to EIA / JESD78.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC Positive DC Supply Voltage 4.0 5.5V V IN Control Pin Input Voltage0 5.5V V I/O Switch Input / Output Voltage0 5.5V T A Operating Free−Air Temperature−55+125°CD t / D V Input Transition Rise or Fall Rate Control InputSwitch I/O 05DCnS/VDC ELECTRICAL CHARACTERISTICSSymbol Parameter Conditions V CC(V)T A = 255CT A =−555C to +1255CUnit Min Typ Max Min MaxV IK Clamp Diode Voltage I I/O = −18 mA 4.5−1.2−1.2VV IH High−Level Input Voltage(Control)4.0 to5.52.0 2.0VV IL Low−Level Input Voltage(Control)4.0 to5.50.80.8VV OH Output Voltage High See Figure 5I IN Input Leakage Current0 v V IN v 5.5 V 5.5±0.1±1.0m A I OFF Power Off Leakage Current V I/O = 0 to 5.5 V0±0.1±1.0m AI CC Quiescent Supply Current I O = 0,V IN = V CC or 0 VOE1 = OE2 = GNDOE1 = OE2 = V CC 5.5±1.0±0.1±1.0±1.0mAm AD I CC Increase in Supply Current(Control Pin)One input at 3.4 V;Other inputs at V CCor GND5.5 2.5mAR ON Switch ON Resistance V I/O = 0,I I/O = 64 mAI I/O = 30 mA 4.5337777WV I/O = 2.4,I I/O = 15 mA155050V I/O = 2.4, I I/O = 15 mA 4.0507070AC ELECTRICAL CHARACTERISTICSSymbol Parameter Test Condition V CC(V)T A = 25 5CT A =−555C to +1255CUnit Min Typ Max Min Maxt PD Propagation Delay, Bus to Bus See Figure 6 4.0 to5.50.250.25nst EN Output Enable Time See Figure 6 4.5 to5.50.8 2.5 4.20.8 4.2ns4.00.8 3.0 4.60.8 4.6t DIS Output Disable Time 4.5 to5.50.8 3.0 4.80.8 4.8ns4.00.8 2.9 4.40.8 4.4C IN Control Input Capacitance V IN = 5 or 0 V 5.0 2.5pF C IO(ON)Switch On Capacitance Switch ON 5.010pF C IO(OFF)Switch Off Capacitance Switch OFF 5.05pFTYPICAL DC CHARACTERISTICSFigure 5. Output Voltage High vs Supply VoltageV CC , SUPPLY VOLTAGE (V)V O H , H I G H L E V E L O U T P U T V O L T A G E (V )3.753.503.253.002.752.502.252.004.504.755.005.255.505.75V CC , SUPPLY VOLTAGE (V)V O H , H I G H L E V E L O U T P U T V O L T A G E (V )3.753.503.253.002.752.502.252.004.504.755.005.255.505.75V CC , SUPPLY VOLTAGE (V)V O H , H I G H L E V E L O U T P U T V O L T A G E (V )AC LOADING AND WAVEFORMS Parameter Measurement InformationCOpen*C L includes probes and jig capacitance.Test S1t PD Open t PLZ/t PZL7 V t PHZ/t PZH OpenVoltage Waveforms Propagation Delay TimesVoltage Waveforms Enable and Disable TimesOutputControltOLOHOutputOutputWaveform 1S1 at 7 V(Note 6)Waveform 2S1 at Open(Note 6)6.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control7.All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, Z O = 50 W, t r v 2.5 ns, t f v 2.5 ns.8.The outputs are measured one at a time, with one transition per measurement.9.t PLZ and t PHZ are the same as t DIS.10.t PZL and t PZH are the same as t EN.11.t PHL and t PLH are the same as t PD.Figure 6. t PD, t EN, t DIS Loading and WaveformsInputOutputV OHV OL3 V0 VtORDERING INFORMATIONDevice Package Shipping†7WBD3306USG US8(Pb−Free)3000 / Tape & Reel7WBD3306MUTAG UDFN8(Pb−Free)3000 / Tape & Reel7WBD3306AMUTCG UQFN8(Pb−Free)3000 / Tape & Reel7WBD3306AMX1TCG ULLGA8 – 0.5 mm Pitch(Pb−Free)3000 / Tape & Reel7WBD3306BMX1TCG ULLGA8 – 0.4 mm Pitch(Pb−Free)3000 / Tape & Reel7WBD3306CMX1TCG ULLGA8 – 0.35 mm Pitch(Pb−Free)3000 / Tape & Reel7WBD3306DMR2G Micro8(Pb−Free)4000 / Tape & Reel(In Development)7WBD3306DTR2G TSSOP8(Pb−Free)4000 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.UDFN8 1.8 x 1.2, 0.4P CASE 517AJ −01ISSUE ONOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b APPLIES TO PLATEDTERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL TIP .4.MOLD FLASH ALLOWED ON TERMINALS ALONG EDGE OF PACKAGE. FLASH MAY NOT EXCEED 0.03 ONTO BOTTOM SURFACE OF TERMINALS.5.DETAIL A SHOWS OPTIONALCONSTRUCTION FOR TERMINALS.DIM MIN MAX MILLIMETERS A 0.450.55A10.000.05A30.127 REF b 0.150.25D 1.80 BSC E 1.20 BSC e 0.40 BSC L 0.450.55b20.30 REF L10.000.03L20.40 REFNOTE 5L1DETAIL A0.328XDIMENSIONS: MILLIMETERSMOUNTING FOOTPRINT*7XSOLDERMASK DEFINED*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.ULLGA8 1.45x1.0, 0.35PCASE 613AA −01ISSUE ANOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP .4.A MAXIMUM OF 0.05 PULL BACK OF THEPLATED TERMINAL FROM THE EDGE OF THEPACKAGE IS ALLOWED.8XDIM MIN MAX MILLIMETERS A −−−0.40A10.000.05b 0.150.25D 1.45 BSC E 1.00 BSC e 0.35 BSC L 0.250.35L10.300.40SOLDERMASK DEFINED*DIMENSIONS: MILLIMETERS7X*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.MOUNTING FOOTPRINTULLGA8 1.6x1.0, 0.4P CASE 613AB −01ISSUE ANOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP .4.A MAXIMUM OF 0.05 PULL BACK OF THEPLATED TERMINAL FROM THE EDGE OF THEPACKAGE IS ALLOWED.8XDIM MIN MAX MILLIMETERS A −−−0.40A10.000.05b 0.150.25D 1.60 BSC E 1.00 BSC e 0.40 BSC L 0.250.35L10.300.40SOLDERMASK DEFINED*DIMENSIONS: MILLIMETERS*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.MOUNTING FOOTPRINTULLGA8 1.95x1.0, 0.5PCASE 613AC −01ISSUE ANOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP .4.A MAXIMUM OF 0.05 PULL BACK OF THEPLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED.DIM MIN MAX MILLIMETERS A −−−0.40A10.000.05b 0.150.25D 1.95 BSC E 1.00 BSC e 0.50 BSC L 0.250.35L10.300.40SOLDERMASK DEFINED*DIMENSIONS: MILLIMETERS7X*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.MOUNTING FOOTPRINT分销商库存信息:ONSEMI7WBD3306AMUTCG7WBD3306USG7WBD3306DTR2G7WBD3306AMX1TCG7WBD3306BMX1TCG7WBD3306CMX1TCG 7WBD3306MUTAG。

Installing e.Report Designer ProfessionalInformation in this document is subject to change without notice. Examples provided are fictitious. No part of this document may be reproduced or transmitted in any form, or by any means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of Actuate Corporation.© 1995 - 2011 by Actuate Corporation. All rights reserved. Printed in the United States of America.Contains information proprietary to:Actuate Corporation, 2207 Bridgepointe Parkway, San Mateo, CA 94404The software described in this manual is provided by Actuate Corporation under an Actuate License agreement. The software may be used only in accordance with the terms of the agreement. Actuate software products are protected by U.S. and International patents and patents pending. For a current list of patents, please see /patents.Actuate Corporation trademarks and registered trademarks include:Actuate, ActuateOne, the Actuate logo, BIRT, Collaborative Reporting Architecture, e.Analysis,e.Report, e.Reporting, e.Spreadsheet, Encyclopedia, Interactive Viewing, OnPerformance, Performancesoft, Performancesoft Track, Performancesoft Views, Report Encyclopedia, Reportlet, The people behind BIRT, and XML reports.Actuate products may contain third-party products or technologies. Third-party trademarks or registered trademarks of their respective owners, companies, or organizations include:Adobe Systems Incorporated: Flash Player. Apache Software Foundation (): Axis, Axis2, Batik, Batik SVG library, Commons Command Line Interface (CLI), Commons Codec, Derby, Shindig, Struts, Tomcat, Xerces, Xerces2 Java Parser, and Xerces-C++ XML Parser. Bits Per Second, Ltd. and Graphics Server Technologies, L.P.: Graphics Server. Bruno Lowagie and Paulo Soares: iText, licensed under the Mozilla Public License (MPL). Castor (), ExoLab Project(), and Intalio, Inc. (): Castor. Codejock Software: Xtreme Toolkit Pro. DataDirect Technologies Corporation: DataDirect JDBC, DataDirect ODBC. Eclipse Foundation, Inc. (): Babel, Data Tools Platform (DTP) ODA, Eclipse SDK, Graphics Editor Framework (GEF), Eclipse Modeling Framework (EMF), and Eclipse Web Tools Platform (WTP), licensed under the Eclipse Public License (EPL). Jason Hsueth and Kenton Varda (): Protocole Buffer. ImageMagick Studio LLC.: ImageMagick. InfoSoft Global (P) Ltd.: FusionCharts, FusionMaps, FusionWidgets, PowerCharts. Mark Adler and Jean-loup Gailly (): zLib. Matt Ingenthron, Eric D. Lambert, and Dustin Sallings (): Spymemcached, licensed under the MIT OSI License. International Components for Unicode (ICU): ICU library. KL Group, Inc.: XRT Graph, licensed under XRT for Motif Binary License Agreement. LEAD Technologies, Inc.: LEADTOOLS. Microsoft Corporation (Microsoft Developer Network): CompoundDocument Library. Mozilla: Mozilla XML Parser, licensed under the Mozilla Public License (MPL). MySQL Americas, Inc.: MySQL Connector. Netscape Communications Corporation, Inc.: Rhino, licensed under the Netscape Public License (NPL). Oracle Corporation: Berkeley DB. PostgreSQL Global Development Group: pgAdmin, PostgreSQL, PostgreSQL JDBC driver. Rogue Wave Software, Inc.: Rogue Wave Library SourcePro Core, tools.h++. Sam Stephenson (): prototype.js, licensed under the MIT license. Sencha Inc.: Ext JS. Sun Microsystems, Inc.: JAXB, JDK, Jstl. ThimbleWare, Inc.: JMemcached, licensed under the Apache Public License (APL). World Wide Web Consortium (W3C)(MIT, ERCIM, Keio): Flute, JTidy, Simple API for CSS. XFree86 Project, Inc.: (): xvfb.All other brand or product names are trademarks or registered trademarks of their respective owners, companies, or organizationDocument No. 110303-2-130510March 2, 2011ContentsIntroduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .iii Understanding ActuateOne . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .iii About the Actuate e.Report Designer Professional documentation . . . . . . . . . . . . . . . . . . . . . . . .iv Accessing examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vi Obtaining documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vi Using PDF documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vi Obtaining late-breaking information and documentation updates . . . . . . . . . . . . . . . . . . . . . .vi About obtaining technical support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii About supported and obsolete products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii Typographical conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii Syntax conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .viii Installing e.Report Designer Professional . . . . . . . . . . . . . . . . . . . . . . . . . . 1 About Actuate e.Report Designer Professional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Installing Actuate e.Report Designer Professional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9iiiI n t r o d u c t i o nUnderstanding ActuateOneActuateOne™ includes Release 11 of Actuate® Corporation’s value-addedproducts for the Eclipse BIRT open source project. ActuateOne institutes aparadigm shift in Business Intelligence technology from individualized tools to asuite of integrated capabilities within a single environment. ActuateOne is onedesigner, one server, one integrated environment providing a single unified userexperience. A common architecture is precisely what today’s information-richglobal environment requires for development and deployment. This unifiedActuate technology continues to enable information management and deliverywhile supporting advanced security, massive scalability, flexibility throughprogramming, and reuse. ActuateOne realizes our corporate vision of a singleuser experience by providing extended new analytics capabilities reaching abroader spectrum of users. The new dashboard functionality supports buildinggadgets to enhance the visual presentation of information. Export to Excel® andother formats integrates Actuate output with other tools on the end-user desktop.Actuate’s cloud-ready server supports elastic clustering for dynamic provision ofuninterrupted efficient service.Information, live demos, and endorsements about this release are available from and . The Actuate site also makes “The ForresterWave™: Open Source Business Intelligence (BI), Q3 2010” report freely available.The report recognizes Actuate and its value-added offerings for BIRT as a leaderin Open Source Business Intelligence.I n t r o d u c t i o n iiiAbout the Actuate e.Report Designer Professional documentationThe printed and online documentation includes the materials described inTable I-1. You can obtain PDF files from . Documentationupdates are created in response to customer needs and are available at this site.The printed and online documentation for e.Report Designer Professional alsoincludes the programming materials described in Table I-2.Table I-1Product documentationFor information about this topic See the following resourceLate-breaking information and documentation updates Release notes and updated localization and PDF files posted on Actuate SupportInstalling Actuate e.Report Designer ProfessionalOverview of Actuate reporting concepts Designing reports using the graphical user interface and programming capabilities of e.Report Designer ProfessionalOverview of data access concepts Accessing data from databases, information objects, text files, Actuate Query output, and ODBC data sources Overview and reference guide for creating a driver to access custom data sourcesViewing and searching Actuate Basic reports using the DHTML viewerDeveloping Actuate Basic Reports using Actuatee.Report Designer Installinge.Report Designer ProfessionalDeveloping Actuate Basic Reports using Actuatee.Report Designer Developing Actuate Basic Reports using Actuatee.Report Designer Developing Reports using e.Report Designer Professional Accessing Data using e.Report Designer ProfessionalWorking with Actuatee.Reportsiv I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a lI n t r o d u c t i o n vFormatting report data for multiple localesReport encodingDesigning reports with right-to-left orientationOverview of Actuate information object conceptsCreating information objects, projects, connection definitions, and maps Building and publishing projects Actuate SQL reference information Configuring database types GlossaryTable I-2Programming documentationFor information about this topic See the following resourceOverview of Actuate Foundation ClassesOverview of how to work with classes and objectsReference for Actuate Foundation Classes, including class inheritance, hierarchy, and descriptions ofproperties, variables, and methods Overview of Actuate Basic syntax and coding conventionsWorking with Actuate Basic variables, data types, and procedures Reference for Actuate Basicprogramming, including descriptions of statements, functions, data types, keywords, and operatorsTable I-1Product documentationFor information about this topic See the following resourceWorking in Multiple Locales using Actuate Basic TechnologyDesigning BIRTInformation ObjectsActuate GlossaryProgramming with Actuate Foundation ClassesProgramming with Actuate BasicAccessing examplesThe Examples folder in the product directory contains report examples. Eachsample report folder contains a variety of files, often including a text file thatdiscusses how the example works.Obtaining documentationActuate provides technical documentation in PDF, HTML, and print formats. Youcan download PDF versions of the documentation from . Ifyou purchase the product, you can also download documentation using ftp asinstructed in the e-mail from Actuate Distribution.If you request a physical package, install the files using the OnlineDocumentation and Localization Resource Files DVD, which ships as part of yourActuate software package. If you select the typical setup when you install fromthe DVD, the installation creates the Actuate11\Manuals directory.Using PDF documentationIn each book, the table of contents and the index page numbers contain links tothe corresponding topics in the text. In the table of contents, you access the link bypositioning the pointer over the topic. In the index, you access the link bypositioning the pointer over the page number.The Actuate11\Manuals directory contains a file, master-index.pdx, which is anAdobe Acrobat Catalog utility that can search all the documents in the ActuateManuals directory. This tool provides a convenient way to find information on aparticular topic in Actuate documentation.Obtaining late-breaking information anddocumentation updatesThe release notes contain late-breaking news about Actuate products andfeatures. The release notes are available on the Actuate Support site at thefollowing URL:/documentation/releasenotesUpdates to documentation in PDF form are available at the following URL: /documentationA new user must first register on the site and log in to view the release notes. also provides product update information. To download updatedproduct documentation, use the following URL:/docupdate11sp1/docupdate.htmlvi I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a lAlternatively, after installing Actuate release 11 products, use Start➛Programs➛Actuate11➛Update Documentation to access this URL.About obtaining technical supportYou can contact customer support by e-mail or telephone. For contactinformation, go to the following URL:/services/support/contact-support.asp About supported and obsolete productsThe Actuate Support Lifecycle Policy and Supported Products Matrix areavailable on the Actuate e.Support web site. You can access the e.Support site atthe following URL:/documentation/spm Typographical conventionsTable I-3 describes the typographical conventions in this document.Table I-3Typographical conventionsItem Convention ExampleCode examples Monospace Dim Text1 As StringFile names Initial capital letter, exceptwhere file names are case-sensitiveDetail.roiKey combination A + sign between keysmeans to press both keysat the same timeCtrl+ShiftMenu items Capitalized, no bold FileSubmenu items Separated from the menuitem by a small arrowFile➛NewUser input or userresponseMonospace M*16*User input in XML and Java code Monospace italics chkjava.execab_name.cabI n t r o d u c t i o n viiSyntax conventionsTable I-4 describes the symbols used to present syntax.Table I-4Syntax conventionsSymbol Description Example[]Optional item[Alias<alias name>]Array subscript matrix[]{}Groups two or moremutually exclusiveoptions or argumentswhen used with a pipe{While | Until}Defines array contents{0, 1, 2, 3}Delimiter of code block public ACJDesigner( ){ }|Separates mutuallyexclusive options orarguments in a group Exit {Do | For | Function | Sub}Java OR operator int length | 4<>Argument you mustsupply<expression to format>Delimiter in XML<xsd:sequence>viii I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a lI n s t a l l i n g e.R e p o r tD e s i g n e r P r o f e s s i o n a lAbout Actuate e.Report Designer ProfessionalActuate e.Report Designer Professional is a report designer for report developerswho design, build and distribute structured content. e.Report DesignerProfessional supports beginning report developers and experienced reportdevelopers who leverage programming.This chapter describes how to install Actuate e.Report Designer ProfessionalRelease 11 Service Pack 1. Installing Actuate e.Report Designer Professional alsoinstalls Actuate BIRT Information Object Designer. To overwrite an existingInformation Object Designer installation during the e.Report DesignerProfessional installation, you must instruct InstallShield™ Wizard to installe.Report Designer Professional in the directory that contains the InformationObject Designer directory. For example, if the Information Object Designerinstallation is located in the C:\MyActuate\IOD directory, specify the followingdirectory for the e.Report Designer Professional installation:C:\MyActuate\eRDProIf you specify a different directory from the one that contains the InformationObject Designer’s installation directory, e.Report Designer Professional’sinstallation installs another instance of Information Object Designer. If you laterchoose to uninstall Information Designer, both instances of Information ObjectDesigner are removed from the system.The Release 11 Service Pack 1 software does not use configuration informationfrom a previous release. For information about upgrading, see Release NotesRelease 11 Service Pack 1.I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a l12I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a lInstalling Actuate e.Report Designer ProfessionalMake sure the user account you use to install e.Report Designer Professional is a member of the Administrators group. On a new Windows Vista installation, the initial user account is, by default, not a member of the Administrators group. Configure the user account to be a member of this group.How to install e.Report Designer Professional1Log in to Windows as Administrator.2Insert the product DVD into your DVD drive.3Using Windows Explorer, navigate to \erdpro on the DVD.4Double-click ActuateeReportDesignerProfessional.exe. InstallShield Wizard extracts the files necessary to install e.Report Designer Professional on your computer. After a few moments, Welcome to the InstallShield Wizard for Actuate e.Report Designer Professional appears, as shown in Figure 1-1. Choose Next.Figure 1-1Starting the InstallShield Wizard for Actuate e.Report Designer Professional5In License Agreement, read the agreement. Select I accept the terms of the license agreement, as shown in Figure 1-2. Then, choose Next.I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a l 3Figure 1-2Accepting the license agreement6In Setup Type, select Typical. If you are installing e.Report DesignerProfessional on a Windows XP Professional, a Windows Server 2003, or a Windows Vista system, the default program location, C:\Program Files\Actuate11\eRDPro, appears as shown in Figure 1-3. If you are installing e.Report Designer Professional on a Windows 7 Professional system, the default program location is C:\Program Files (x86)\Actuate11\eRDPro.Choose Next.Figure 1-3Selecting the Typical setup type4I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a l7In Locale Information, select a locale. The illustrations in this manual use the English (United States) locale, as shown in Figure 1-4. The computer’soperating system language and regional settings must be compatible with the default locale settings you configure during installation. Choose Next.Figure1-4Selecting the US English locale8In Start Copying files, verify the program components to be installed, as shown in Figure 1-5. Then, choose Next.Figure 1-5Verifying program components before copying filesI n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a l 5Setup Status displays messages about the progress of the installation. First, the wizard installs Actuate Information Object Designer, as shown in Figure 1-6.Figure1-6Monitoring the installation of Information Object DesignerThen, the wizard installs Actuate e.Report Designer Professional, as shown in Figure 1-7.Figure 1-7Monitoring the installation of e.Report Designer Professional6I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a l9The final step of the installation depends on whether Windows determines that a reboot is necessary:■If prompted to view the ReadMe file, choose No.To complete the installation wizard, select No, I will restart my computer later, as shown in Figure 1-8. Then, choose Finish.Figure 1-8Selecting to reboot later and finish the e.Report Designer Professional installation wizard■If a reboot is not required, clear I would like to view the ReadMe file, as shown in Figure 1-9. Then, choose Finish to exit the installation wizard.Figure 1-9Selecting not to view the ReadMe fileI n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a l 710In the message that reminds you to install Actuate Online Documentation and Localization Resource Files, similar to the one in Figure 1-10, choose OK.Figure1-10Localization and Online Documentation reminder message8I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a lIndexAaccessingonline documentation visample reports vi ActuateeReportDesignerProfessional.exe2 Adobe Acrobat Catalog viBBIRT Designer Professionaloverview1Ccurrent release iv, viDdocumentation ivconventions used in viiobtaining vidownloadingdocumentation viEe.Report Designer Professionaldocumentation for ivinstalling2–7example reports. See sample reports Examples directory viIindex (online documentation)vi installatione.Report Designer Professional2–7Llanguage settings4links vilocale settings4MManuals directory vimaster indexfinding viOonline documentation ivonline documentation, downloading viPPDF documentation viRregional settings4release notes iv, vireporting examples. See Example directory reportsaccessing sample viSsample reports visupported products page viisyntax conventions (documentation)viiiTtypographic conventions (documentation)viiVVista operating systems2I n d e x910I n s t a l l i n g e.R e p o r t D e s i g n e r P r o f e s s i o n a l。

PM-3112-160-MTCP2 Loops single-phase Smart Power MeterQuick Start GuideProduct Website:https:///pm_3112_160_mtcp1. IntroductionICP DAS brings the most powerful, cost-effective, advanced Smart Power Meters PM-3 000 series that gives you access to real-time electric usage for single-phase power measurement. With its high accuracy (<0.5% , PF=1 ), the PM-30 00 series can be applied to both low voltage primary side and/o r medium/high volt age secondary side and enables the users to obtain reliable and accurate energy consumption readings from the monitored equipment in real time under operation. These compact size and cost-effective power meters are equipped with revolutionary wired clip-on CT (various types, support input current up to 200 A). It operates over a wide input voltages range 10 ~ 300 VAC which allow s worldwide compatibility. And with 2 channels relay output, it can be linked with sirens or lightings for alarm messages. It also supports Modbus R TU, Modbus TCP or CAN bus protocols for easy integration.2.1. Caution & WarningThe meter contains hazardous voltages, and should never be disassembled. Failing to follow this practice will result in serious injury or death. Any work on or near energized meters, meter sockets, or other metering equipment could induce a danger of electrical shock. It is strongly recommended that all work should be performed only by qualified industrial electricians and metering specialist. ICP DAS assumes no responsibility if your electrical installer does not follow the appropriate national and local electrical codes.ICP DAS assumes no liability for any damage resulting from the use of this product. ICP DAS reserves the right to change this manual at any time without notice. The information furnished by ICP DAS is believed to be accurate and reliable. However, no responsibility is assumed by ICP DAS for its use, not for any infringements of patents or other rights of third parties resulting from its use.2.2. Product Warranty & Customer SupportICP DAS warrants all products free from defects in material and workmanship for a period of one year from the date of shipping. During the warranty period, we will, at our position, either repair or replace any product that proves to be defective.To report any defect, please contact ：+310-517-9888 or *******************2.3. Limitation of WarrantyThis warranty does not apply to defects resulting from unauthorized modification, misuse, or use for reason other than electrical power monitoring. The supplied meter is not a user-serviceable product.3. InstallationPlease use the soft dry clothes to clean the instrument.Please do not use any chemical or detergent or volatile solvents to clean the instrument, in order to avoid any possibility of the cover damage.3.1.∙Dimension: 127mm（length）× 33mm（wide）× 105mm（high）∙Products come with external split type clip-on CT’s. Disconnect the CT’s or use other CT’s is highly prohibited.∙Please read this operation manual carefully before using.∙Please re-confirm the measure position.∙Reconfirm the RST (ABC) phase sequence of the power system.∙PM-3133 series can be installed as rail mounting mode or embedded, no need to drill a hole or screw to fix it (rail mounting width can up to the length of 35 mm).∙Meter auxiliary power for PM-311x series is DC +12V ~+48V or DC +10V ~ +30V (For PM- 311x-xxxC).3.2. Voltage Input1.PM-311x series: Input Voltage up to 300V. For any higher Input Voltage large than 300V, pleaseadd the PT (power transformer), and Change PT RATIO setup.Notice: Please check th e L‐N connection of PM‐311x‐xxxC series or it will cause the damage. Please r efer the following diagram.3.3. Current Input1. The external CT’s are fragile, please handle with care.2. The current input of PM-311x series is in mA range. Only the ex-factory attached CT’s can be used.The other CT’s, for example, from p anel will damage the instrument due to its large current (around 5A)3. When more than one smart meters (PM-311x series) are installed, please do not disconnect the CTwith its original meter and mix us e with each other. Since each set of smart meter (PM- 311x series) and its attached split type clip -on CT are calibrated set by set. The mix use may cause wrongmeasurements.4. To install CT’s c orrectly, please ensure the CT lines sequences is right before clip the CT’s onto thepower cable of the monitoring equipment. (De tail will be found in next section)5. When measuring the current, the secondary circuit of a CT should never be opened when a load ispassing through its primary. Make sure you always open the CT clip to detach the CT before removing the terminal lines. Otherwise, it will cause severe injury.6. Plea se handle with extra care, especially when the operation space of CT’s is limited.7. The current direction must follow K-L marked on CT’s.8. Please select the right size CT’s for different size of monitoring equipment cables:Power cable diameter ＜Φ10 use 60 A CT，Φ10～Φ16 use 100A CT，Φ16～Φ24 use 200A CT9. The maximum current value cannot exceed the CT rating.3.4. Connection3.5. CT’s installation steps3.6. Wiring4. Relay Output & LED Indicator●Relay Output●LED IndicatorThe PM-311x as 4 LED to indicate the unit power status, communication, andpower data calculation.⏹RUN: Green, light up after communication ready. LED will flashwhen the unit is processing communication.⏹PWR: Red, Power on LED always on.⏹DO0: Green. LED DO0 will lig ht up, when DO0 is “ON”.⏹DO1: Green. LED DO1 will lig ht up, when DO1 is “ON”.5. Communication。

2394312-1Portable Crimp Tools, Commercial Crimp Tooling, Operator Releasable &Adjustable, Removable/Interchangeable, TE Product Specification (114-), ManualApplication Tooling>Portable Crimp ToolsTE Certification:Cannot be CertifiedSpecification Type:TE Product Specification (114-)Die Sets Type:Removable/InterchangeableRatchet Configuration:Operator Releasable & AdjustableTool Grade:Commercial Crimp ToolingFeaturesOtherCrimp Form-Wire Barrel Type Open Barrel - F CrimpTool Grade Commercial Crimp ToolingRatchet Configuration Operator Releasable & AdjustableDie Sets Type Removable/InterchangeableSpecification Type TE Product Specification (114-)TE Certification Cannot be CertifiedPower Technology Type ManualTooling Type SDE Crimp Hand ToolProduct ComplianceFor compliance documentation, visit the product page on >EU RoHS Directive 2011/65/EU Out of ScopeEU ELV Directive 2000/53/EC Out of ScopeChina RoHS 2 Directive MIIT Order No 32, 2016No Restricted Materials Above ThresholdEU REACH Regulation (EC) No. 1907/2006Current ECHA Candidate List: JUNE 2022(224)Not Yet ReviewedHalogen Content Not Yet Reviewed for halogen contentSolder Process Capability Not applicable for solder process capability 2394312-1 ACTIVETE Internal #:2394312-1Portable Crimp Tools, Commercial Crimp Tooling, OperatorReleasable & Adjustable, Removable/Interchangeable, TE ProductSpecification (114-), ManualView on >2394312-1Portable Crimp Tools, Commercial Crimp Tooling, Operator Releasable &Adjustable, Removable/Interchangeable, TE Product Specification (114-), ManualProduct Compliance DisclaimerThis information is provided based on reasonable inquiry of our suppliers and represents our current actual knowledge based on the information they provided. This information is subject to change. The part numbers that TE has identified as EU RoHS compliant have a maximum concentration of 0.1% by weight in homogenous materials for lead, hexavalent chromium, mercury, PBB, PBDE, DBP, BBP, DEHP, DIBP, and 0.01% for cadmium, or qualify for an exemption to these limits as defined in the Annexes of Directive 2011/65/EU (RoHS2). Finished electrical and electronic equipment products will be CE marked as required by Directive 2011/65/EU. Components may not be CE marked. Additionally, the part numbers that TE has identified as EU ELV compliant have a maximum concentration of 0.1% by weight in homogenous materials for lead, hexavalent chromium, and mercury, and 0.01% for cadmium, or qualify for an exemption to these limits as defined in the Annexes of Directive 2000/53/EC (ELV). Regarding the REACH Regulation, the information TE provides on SVHC in articles for this part number is based on the latest European Chemicals Agency (ECHA) ‘Guidance onrequirements for substances in articles’ posted at this URL: https://echa.europa.eu/guidance-documents/guidance-on-reachTE Part #2362810-1SDE CRIMP HAND TOOL FRAME W /O DIESTE Part #2394312-2SDE F PIN 22-26 DIE SETTE Part #1586316-3VAL-U-LOK PIN PHBZ SN 26-22 LPTE Part #1586316-4VAL-U-LOK PIN PHBZ AU 26-22 LPTE Part #1586316-2VAL-U-LOK PIN BR AU 26-22 LPTE Part #1586316-1VAL-U-LOK PIN BR SN 26-22 LPCompatible PartsDocumentsDatasheets & Catalog PagesBottoming DiesEnglishSDE Crimp Commercial Tool SystemEnglishInstruction SheetsInstruction Sheet (U.S.)English。

【关键字】统计
中国电信e家终端综合统计报表系统源数据采集测试规范
中国电信集团公司
2008年6月
目录
1 范围
e家终端综合统计报表系统用以从ITMS获得统一格式的e家业务相关统计数据，并进行报表形式的呈现。

本尝试方案主要针对综合统计报表系统功能以及报表系统和ITMS的接口进行尝试。

尝试内容包含了报表数据完整性、报表呈现等。

2 尝试组网方案
各省ITMS作为源系统，将源数据以文本文件方式保存到指定路径，综合报表系统再通过FTP方式从各地ITMS进行数据采集，获得源数据。

获得的数据经过整合、转化并通过FTP将数据的集成结果反馈到各省ITMS系统。

现网网络部署参见具体部署方案，实验室环境只要求实现IP地址的可达，主要对综合统计报表系统的功能以及报表系统和ITMS的接口进行尝试，部署方案涉及到的功能不在本尝试方案内。

图综合统计报表系统数据采集网络拓扑
3 尝试内容
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