OV2650 Camera Module Hardware Application Notes1.03 OVT

MTK移植camera说明1、裁剪模块修改文件：config/tf902/ProjectConfig.mkEg\config/tf902/ProjectConfig.mk````````````````````````````````````````````CUSTOM_HAL_EEPROM = dummy_eepromCUSTOM_HAL_FLASHLIGHT = constant_flashlightCUSTOM_HAL_FMRADIO = mt6628-CUSTOM_HAL_IMGSENSOR = ov8825_mipi_raw s5k8aayx_mipi_yuv+CUSTOM_HAL_IMGSENSOR = gc2235mipi_raw gc0313mipi_yuv#ov8825_mipi_raw s5k8aa yx_mipi_yuv #添加摄像头模块，定义hal层CUSTOM_HAL_LENS = ov8825af dummy_lensCUSTOM_HAL_MAIN2_IMGSENSOR =CUSTOM_HAL_MAIN_BACKUP_IMGSENSOR =CUSTOM_HAL_MAIN_BACKUP_LENS = dummy_lens-CUSTOM_HAL_MAIN_IMGSENSOR = ov8825_mipi_raw+CUSTOM_HAL_MAIN_IMGSENSOR = gc2235mipi_raw #ov8825_mipi_raw #主摄像头在hal层的修改CUSTOM_HAL_MAIN_LENS = ov8825afCUSTOM_HAL_MSENSORLIB = mmc328x akm8975 ami304 yamaha530 mag3110 akmd8963 b mm050CUSTOM_HAL_SENSORS = sensorCUSTOM_HAL_SUB_BACKUP_IMGSENSOR =CUSTOM_HAL_SUB_BACKUP_LENS = dummy_lens-CUSTOM_HAL_SUB_IMGSENSOR = s5k8aayx_mipi_yuv+CUSTOM_HAL_SUB_IMGSENSOR = gc0313mipi_yuv #s5k8aayx_mipi_yuv #副摄像头在hal 层的定义CUSTOM_HAL_SUB_LENS = dummy_lensCUSTOM_KERNEL_ACCELEROMETER = bma050CUSTOM_KERNEL_ALSPS = cm36283@@ -79,7 +79,7 @@ CUSTOM_KERNEL_FLASHLIGHT = constant_flashlightCUSTOM_KERNEL_FM = mt6628CUSTOM_KERNEL_HDMI =CUSTOM_KERNEL_HEADSET = accdet-CUSTOM_KERNEL_IMGSENSOR = ov8825_mipi_raw s5k8aayx_mipi_yuv+CUSTOM_KERNEL_IMGSENSOR = gc2235mipi_raw gc0313mipi_yuv#ov8825_mipi_raw s5k 8aayx_mipi_yuv #添加摄像头在kernal 模块CUSTOM_KERNEL_KPD = kpdCUSTOM_KERNEL_LCM = bi097xn02_xga_dpiCUSTOM_KERNEL_LEDS = mt65xx+CUSTOM_KERNEL_MAIN_IMGSENSOR = gc2235mipi_raw #ov8825_mipi_raw #在底层定义主摄像头CUSTOM_KERNEL_MAIN_LENS = ov8825afCUSTOM_KERNEL_RTC = rtcCUSTOM_KERNEL_SOUND = amp_6320pmic_spkCUSTOM_KERNEL_SSW = ssw_genericCUSTOM_KERNEL_SUB_BACKUP_IMGSENSOR =CUSTOM_KERNEL_SUB_BACKUP_LENS = dummy_lens-CUSTOM_KERNEL_SUB_IMGSENSOR = s5k8aayx_mipi_yuv+CUSTOM_KERNEL_SUB_IMGSENSOR = gc0313mipi_yuv#s5k8aayx_mipi_yuv #在底层定义副摄像头CUSTOM_KERNEL_SUB_LENS = dummy_lensCUSTOM_KERNEL_TOUCHPANEL = GT82X #cy8ctma300 GT818B-fpgaCUSTOM_KERNEL_USB = mt6577上面的修改是在平台没有默认AF（自动对焦）的功能（mtk6517和mtk6577\mtk6572的平台没有默认AF功能），mtk6589的平台默认就支持AF功能。

Advanced Information Preliminary DatasheetO mniTMisionOV9650S1G Color CMOS SXGA (1.3 MegaPixel) with OmniPixel TM TechnologyConcept Camera Module for Socket SolutionGeneral DescriptionKey SpecificationsOV9650S1GColor CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera ModuleO Functional DescriptionFigure 2 shows the functional block diagram of the OV9650S1G Camera Module. The OV9650S1G includes:•1/4"lens •OV9650 C AMERA C HIP image sensor •Socket connectorFigure 2 Functional Block DiagramFunctional DescriptionO Imaging SpecificationsTable 1Sensor Image FunctionsOV9650S1GColor CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera ModuleOPin DescriptionNOTE:Y[9:2] for 8-bit YUV or RGB (Y9 MSB, Y2 LSB)Y[9:0] for 10-bit RGB (Y9 MSB, Y0 LSB)Table 3Pin DescriptionPin NumberName Pin Type Function/Description01VSYNC Output Vertical sync output 02HREF Output HREF output 03PCLK Output Pixel clock output04DOVDD Power Digital power supply (V DD-IO = 2.5 to 3.3 VDC) for I/O05RESET Function (default = 0)Clears all registers and resets them to their default values. Active high, internal pull-down resistor.06Y9Output Output bit[9] - MSB for 10-bit RGB and 8-bit YUV 07Y7Output Output bit[7]08Y8Output Output bit[8]09Y6Output Output bit[6]10DGND Power Digital ground11Y1Output Output bit[1] - for 10-bit RGB only 12Y3Output Output bit[3]13Y5Output Output bit[5]14Y4Output Output bit[4]15Y2Output Output bit[2] - LSB for 8-bit YUV 16SIO_D I/O SCCB serial interface data I/O17AVDD Power Analog power supply (V DD-A = 2.45 to 2.8 VDC)18AGND Power Analog ground 19NC–Reserved - no connect20PWDNFunction (default = 0)Power Down Mode Selection - active high, internal pull-down resistor.0:Normal mode1:Power down mode 21SIO_C Input SCCB serial interface clock input22DVDD Power Power supply (V DD-C = 1.8 VDC + 10%) for digital core logic 23XVCLK1Input Crystal clock input24Y0OutputOutput bit[0] - LSB for 10-bit RGB onlyElectrical CharacteristicsOElectrical CharacteristicsNOTE:Exceeding the Absolute Maximum ratings shown above invalidates all AC and DC electrical specifications and may result in permanent device damage.Table 4Absolute Maximum RatingsAmbient Storage Temperature-40ºC to +95ºCSupply Voltages (with respect to Ground)V DD-A4.5 V V DD-C 3 V V DD-IO4.5 VAll Input/Output Voltages (with respect to Ground)-0.3V to V DD-IO +1V Lead Temperature, Surface-mount process +230ºC ESD Rating, Human Body model 2000VTable 5DC Characteristics (-20°C < T A < 70°C)Symbol ParameterConditionMin Typ Max Unit V DD-A DC supply voltage – Analog – 2.45 2.5 2.8V V DD-C DC supply voltage – Core – 1.62 1.8 1.98V V DD-IO DC supply voltage – I/O power – 2.25– 3.6V I DDA Active (Operating) Current See Note a a. V DD-A = 2.5V, V DD-C = 1.8V, V DD-IO = 3.0VI DDA = ∑{I DD-IO + I DD-C + I DD-A }, f CLK = 24MHz at 7.5 fps YUV output, no I/O loading20mA I DDS-SCCB Standby Current See Note b b. V DD-A = 2.5V, V DD-C = 1.8V, V DD-IO = 3.0VI DDS:SCCB refers to a SCCB-initiated Standby, while I DDS:PWDN refers to a PWDN pin-initiated Standby 1mA I DDS-PWDN Standby Current 10µA V IH Input voltage HIGH CMOS0.7 x V DD-IOV V IL Input voltage LOW 0.3 x V DD-IOV V OH Output voltage HIGH CMOS0.9 x V DD-IOV V OL Output voltage LOW 0.1 x V DD-IOV I OH Output current HIGH See Note cc.Standard Output Loading = 25pF, 1.2K Ω8mA I OL Output current LOW 15mA I LInput/Output LeakageGND to V DD-IO ± 1µAOV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module OTable 6 Functional and AC Characteristics (-20°C < T A < 70°C)Symbol Parameter Min Typ Max Unit Functional CharacteristicsA/D Differential Non-Linearity+ 1/2LSBA/D Integral Non-Linearity+1LSBAGC Range18dBRed/Blue Adjustment Range12dB Inputs (PWDN, CLK, RESET)f CLK Input Clock Frequency102448MHzt CLK Input Clock Period2142100ns t CLK:DC Clock Duty Cycle455055% t S:RESET Setting time after software/hardware reset1ms t S:REG Settling time for register change (10 frames required)300ms SCCB Timing (see Figure4)f SIO_C Clock Frequency400KHzt LOW Clock Low Period 1.3µs t HIGH Clock High Period600ns t AA SIO_C low to Data Out valid100900ns t BUF Bus free time before new START 1.3µs t HD:STA START condition Hold time600ns t SU:STA START condition Setup time600ns t HD:DAT Data-in Hold time0µs t SU:DAT Data-in Setup time100ns t SU:STO STOP condition Setup time600ns t R, t F SCCB Rise/Fall times300ns t DH Data-out Hold time50ns Outputs (VSYNC, HREF, PCLK, and Y[9:0] (see Figure5, Figure6, Figure7, Figure8, Figure10, and Figure11) t PDV PCLK[↓] to Data-out Valid5ns t SU Y[9:0] Setup time15ns t HD Y[9:0] Hold time8ns t PHH PCLK[↓] to HREF[↑]05ns t PHL PCLK[↓] to HREF[↓]05nsAC Conditions:• V DD: V DD-C = 1.8V, V DD-A = 2.5V, V DD-IO = 3.0V • Rise/Fall Times: I/O: 5ns, MaximumSCCB: 300ns, Maximum • Input Capacitance: 10pf• Output Loading: 25pF, 1.2KΩ to 3V• f CLK: 24MHzTiming SpecificationsOTiming SpecificationsFigure 4 SCCB Timing DiagramOV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module OFigure 7 VGA Frame TimingTiming SpecificationsOFigure 10 CIF Frame TimingOV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module OFigure 13 RGB 565 Output Timing DiagramRegister Set Table7 shows detailed descriptions of the Device Control registers. The device slave addresses for the OV9650S1G are 60 for write and 61 for read.Table 7 Device Control Register ListAddress (Hex)RegisterNameDefault(Hex)R/W Description00GAIN00RW AGC[7:0] – Gain control gain setting •Range: [00] to [FF]01BLUE80RW AWB – Blue channel gain setting •Range: [00] to [FF]02RED80RW AWB – Red channel gain setting •Range: [00] to [FF]03VREF12RW Vertical Frame ControlBit[7:6]:AGC[9:8] (see register GAIN for AGC[7:0])Bit[5:3]:VREF end low 3 bits (high 8 bits at VSTOP[7:0] Bit[2:0]:VREF start low 3 bits (high 8 bits at VSTRT[7:0]04COM100RW Common Control 1Bit[7]:ReservedBit[6]:CCIR656 formatBit[5]:QQVGA or QQCIF format. Effective only when QVGA or QCIF output is selected (register bit COM7[4]) and relatedHREF skip mode based on format is selected (registerCOM1[3:2])Bit[4]:ReservedBit[3:2]:HREF skip option00:No skip01:YUV/RGB skip every other row for YUV/RGB, skip 2rows for every 4 rows for Raw data1x:Skip 3 rows for every 4 rows for YUV/RGB, skip 6 rowsfor every 8 rows for Raw dataBit[1:0]:AEC low 2 LSB (see registers AECHM for AEC[15:10] and AECH for AEC[9:2])05BAVE00RW U/B Average LevelAutomatically updated based on chip output format06GEAVE00RW Y/Ge Average LevelAutomatically updated based on chip output format07RSVD00–Reserved08RAVE00RW V/R Average LevelAutomatically updated based on chip output format09COM201RW Common Control 2Bit[7:5]:ReservedBit[4]:Soft sleep modeBit[3:2]:ReservedBit[1:0]:Output drive capability00:1x01:2x10:2x11:4x0A PID96R Product ID Number MSB (Read only) 0B VER50R Product ID Number LSB (Read only)0C COM300RW Common Control 3Bit[7]:ReservedBit[6]:Output data MSB and LSB swapBit[5:4]:ReservedBit[3]:Pin selection1:Change RESET pin to EXPST_B (frame exposuremode timing) and change PWDN pin to FREX (frameexposure enable)Bit[2]:VarioPixel for VGA and CIFBit[1]:ReservedBit[0]:Single frame output (used for Frame Exposure mode only)0D COM400RW Common Control 4Bit[7]:VarioPixel for QVGA, QCIF, QQVGA, and QQCIFBit[6]:ReservedBit[5]:Pixels for sub-sampling mode0:Get average neighbor pixel in sub-sampling mode1:Get sum instead of average neghbor pixel insub-sampling modeBit[4:3]:ReservedBit[2]:Tri-state option for output clock at power-down period 0:Tri-state at this period1:No tri-state at this periodBit[1]:Tri-state option for output data at power-down period 0:Tri-state at this period1:No tri-state at this periodBit[0]:Reserved(Hex)Name(Hex)R/W Description0E COM501RW Common Control 5Bit[7]:System clock selection. If the system clock is 48 MHz, this bit should be set to high to get 15 fps for YUV or RGB Bit[6:5]:ReservedBit[4]:Slam mode enable0:Master mode1:Slam mode (used for slave mode)Bit[3]:ADC offset manual control0:Offset is controlled automatically1:Register OFON[7:4] can enable ADC offset addition Bit[2:1]:ReservedBit[0]:Exposure step can be set longer than VSYNC time1:In Normal mode, AEC changes by 1/16 and in Fastmode, AEC changes by double0F COM643RW Common Control 6Bit[7]:Output of optical black line option0:Disable HREF at optical black1:Enable HREF at optical black Bit[6:5]:ReservedBit[4]:HREF is high from optical black lineBit[3]:Enable bias for ADBLCBit[2]:ADBLC offset0:Use 4-channel ADBLC1:Use 2-channel ADBLCBit[1]:Reset all timing when format changes Bit[0]:Enable ADBLC option10AECH40RW Exposure ValueBit[7:0]:AEC[9:2] (see registers AECHM for AEC[15:10] and COM1 for AEC[1:0])11CLKRC00RW Data Format and Internal ClockBit[7]:Digital PLL option0:Disable double clock option, meaning the maximumPCLK can be as high as half input clock1:Enable double clock option, meaning the maximumPCLK can be as high as input clockBit[6]:Use external clock directly (no clock pre-scale available) Bit[5:0]:Internal clock pre-scalarF(internal clock) = F(input clock)/(Bit[5:0]+1)•Range: [0 0000] to [1 1111](Hex)Name(Hex)R/W Description12COM700RW Common Control 7Bit[7]:SCCB Register Reset0:No change1:Resets all registers to default valuesBit[6]:Output format - VGA selectionBit[5]:Output format - CIF selectionBit[4]:Output format - QVGA selectionBit[3]:Output format - QCIF selectionBit[2]:Output format - RGB selectionBit[1]:ReservedBit[0]:Output format - Raw RGB (COM7[2] must be set high)13COM88F RW Common Control 8Bit[7]:Enable fast AGC/AEC algorithmBit[6]:AEC - Step size limit (used only in fast condition and COM5[0] is low)0:Fast condition change maximum step is VSYNC1:Unlimited step sizeBit[5]:Banding filter ON/OFFBit[4]:ReservedBit[3]:Enable AEC time can be less than 1 line optionBit[2]:AGC EnableBit[1]:AWB EnableBit[0]:AEC Enable14COM94A RW Common Control 9Bit[7]:ReservedBit[6:4]:Automatic Gain Ceiling - maximum AGC value000:2x001:4x010:8x011:16x100:32x101:64x110:128xBit[3]:Exposure timing can be less than limit of banding filter when light is too strongBit[2]:Data format - VSYNC drop option0:VSYNC always exists1:VSYNC will drop when frame data drops Bit[1]:Enable drop frame when AEC step is larger than VSYNC Bit[0]:Freeze AGC/AEC(Hex)Name(Hex)R/W Description21GBOS80RW Gb channel ADBLC resultBit[7]:Offset adjustment sign0:Add offset1:Subtract offsetBit[6:0]:Offset value of 10-bit range22GROS80RW Gr channel ADBLC resultBit[7]:Offset adjustment sign0:Add offset1:Subtract offsetBit[6:0]:Offset value of 10-bit range23ROS80RW R channel ADBLC resultBit[7]:Offset adjustment sign0:Add offset1:Subtract offsetBit[6:0]:Offset value of 10-bit range24AEW78RW AGC/AEC - Stable Operating Region (Upper Limit) 25AEB68RW AGC/AEC - Stable Operating Region (Lower Limit)26VPT D4RW AGC/AEC Fast Mode Operating Region Bit[7:4]:Upper limit of 4 MSBBit[3:0]:Lower limit of 4 LSB27BBIAS80RW B Channel Signal Output Bias (effective only when COM6[0] = 1)Bit[7]:Bias adjustment sign0:Add bias1:Subtract biasBit[6:0]:Bias value of 10-bit range28GbBIAS80RW Gb Channel Signal Output Bias (effective only when COM6[0] = 1) Bit[7]:Bias adjustment sign0:Add bias1:Subtract biasBit[6:0]:Bias value of 10-bit range29Gr_COM00RW Analog BLC and Regulator Control Bit[7:6]:ReservedBit[5]:Bypass Analog BLCBit[4]:Bypass regulatorBit[3:0]:Reserved2A EXHCH00RW Dummy Pixel Insert MSBBit[7:4]: 4 MSB for dummy pixel insert in horizontal direction Bit[3:2]:HSYNC falling edge delay 2 MSBBit[1:0]:HSYNC rising edge delay 2 MSB2B EXHCL00RW Dummy Pixel Insert LSB8 LSB for dummy pixel insert in horizontal direction(Hex)Name(Hex)R/W Description2C RBIAS80RW R Channel Signal Output Bias (effective only when COM6[0] = 1) Bit[7]:Bias adjustment sign0:Add bias1:Subtract biasBit[6:0]:Bias value of 10-bit range2D ADVFL00RW LSB of insert dummy lines in vertical direction (1 bit equals 1 line) 2E ADVFH00RW MSB of insert dummy lines in vertical direction2F YAVE00RW Y/G Channel Average Value30HSYST08RW HSYNC Rising Edge Delay (low 8 bits)31HSYEN30RW HSYNC Falling Edge Delay (low 8 bits)32HREF A4RW HREF ControlBit[7:6]:HREF edge offset to data outputBit[5:3]:HREF end 3 LSB (high 8 MSB at register HSTOP) Bit[2:0]:HREF start 3 LSB (high 8 MSB at register HSTART)33CHLF00RW Bit[7:0]:Reserved 34ARBLM03RW Bit[7:0]:Reserved 35-36RSVD XX–Reserved37ADC04RW Bit[7:0]:Reserved 38ACOM12RW Bit[7:0]:Reserved39OFON00RW Bit[7:4]:ReservedBit[3]:Line buffer power down - must be set to "1" before chip power downBit[2:0]:Reserved3A TSLB0C RW Line Buffer Test OptionBit[7:6]:ReservedBit[5]:Bit-wise reverseBit[4]:UV output value0:Use normal UV output1:Use fixed UV value set in registers MANU and MANVas UV output instead of chip outputBit[3]:Output sequence is Y U Y V instead of U Y V YBit[2]:Output sequence is Y V Y U instead of Y U Y VBit[1]:ReservedBit[0]:Digital BLC(Hex)Name(Hex)R/W Description3B COM1100RW Common Control 11Bit[7]:Night mode0:Night mode disable1:Frame rate will adjust based on COM11[6:5] beforeAGC gain increases more than 2. Also,ADVFL andADVFL will be automatically updated.Bit[6:5]:Night mode insert frame option00:Normal frame rate01:1/2 frame rate10:1/4 frame rate11:1/8 frame rateBit[4:3]:Average calculation window option00:Use full frame01:Use half frame10:Use quarter frame11:Use lower two-thirdsBit[2:1]:ReservedBit[0]:Manual banding filter mode3C COM1240RW Common Control 12Bit[7]:HREF option0:No HREF when VREF is low1:Always has HREFBit[6:3]:ReservedBit[2]:Enable YUV averageBit[1:0]:Reserved3D COM1399RW Common Control 13Bit[7:6]:Gamma selection for signal00:No gamma function01:Gamma used for Y channel only10:Gamma used for Raw data before interpolation11:Not allowedBit[5]:ReservedBit[4]:Enable color matrix for RGB or YUVBit[3]:Enable Y channel delay option0:Delay UV channel1:Delay Y channelBit[2:0]:Output Y/UV delay3E COM140E RW Common Control 14Bit[7:2]:ReservedBit[1]:Enable edge enhancement for YUV output (effective only for YUV/RGB, no use for Raw data)Bit[0]:Edge enhancement option0:Edge enhancement factor = EDGE[3:0]1:Edge enhancement factor = 2 x EDGE[3:0](Hex)Name(Hex)R/W Description3F EDGE88RW Edge Enhancement AdjustmentBit[7:4]:Edge enhancement threshold[3:0](see register COM22[7:6} for Edge threshold[5:4]) Bit[3:0]:Edge enhancement factor40COM15C0RW Common Control 15Bit[7:6]:Data format - output full range enable0x:Output range: [10] to [F0]10:Output range: [01] to [FE]11:Output range: [00] to [FF]Bit[5:4]:RGB 555/565 option (must set COM7[2] high) x0:Normal RGB output01:RGB 56511:RGB 555Bit[3]:Swap R/B in RGB565/RGB555 formatBit[2:0]:Reserved41COM1610RW Common Control 16Bit[7:2]:ReservedBit[1]:Color matrix coefficient double option Bit[0]:Reserved42COM1708RW Common Control 17Bit[7:5]:ReservedBit[4]:Edge enhancement optionBit[3]:ReservedBit[2]:Select single frame outBit[1]:Tri-state outputBit[0]:Reserved43-4E RSVD XX–Reserved4F MTX158RW Matrix Coefficient 1 50MTX248RW Matrix Coefficient 2 51MTX310RW Matrix Coefficient 3 52MTX428RW Matrix Coefficient 4 53MTX548RW Matrix Coefficient 5 54MTX670RW Matrix Coefficient 6 55MTX740RW Matrix Coefficient 7 56MTX840RW Matrix Coefficient 8 57MTX940RW Matrix Coefficient 958MTXS0F RW Matrix Coefficient Sign for coefficient 9 to 2 0:Plus1:Minus59-61RSVD XX–Reserved(Hex)Name(Hex)R/W Description62LCC100RW Lens Correction Option 163LCC200RW Lens Correction Option 264LCC310RW Lens Correction Option 365LCC480RW Lens Correction Option 466LCC500RW Lens Correction Control67MANU80RW Manual U Value (effective only when register TSLB[4] is high) 68MANV80RW Manual V Value (effective only when register TSLB[4] is high)69HV00RW Manual Banding Filter MSBBit[7:1]:ReservedBit[0]:Matrix coefficient 1 sign6A MBD00RW LSB of Banding Filter Value (effective only when COM11[0] is high). 6B DBLV0A RW Bit[7:0]:Reserved6C-7B GSP XX RW Gamma curve7C-8A GST XX RW Gamma curve8B COM2104RW Common Control 21Bit[7:4]:ReservedBit[3]:VGA option - use VGA window modeBit[2]:ReservedBit[1]:Digital BLC optionBit[0]:UV channel uses sum or average of neighbor pixel in sub-sampling mode8C COM2200RW Common Control 22Bit[7:6]:Edge enhancement threshold[5:4](see register EDGE[7:4} for Edge threshold[3:0]) Bit[5]:De-noise enableBit[4:2]:ReservedBit[1]:White-pixel erase enableBit[0]:White-pixel erase option8D COM2300RW Common Control 23Bit[7:5]:ReservedBit[4]:Color bar test modeBit[3:2]:ReservedBit[1]:Digital AWB enableBit[0]:Reserved8E COM2400RW Common Control 24Bit[7:0]:Reserved(Hex)Name(Hex)R/W DescriptionRegister SetO8F DBLC10F RWDigital BLC Offset SignBit[7:4]:ReservedBit[3]:Digital BLC B offset sign Bit[2]:Digital BLC R offset sign Bit[1]:Digital BLC Gb offset sign Bit[0]:Digital BLC Gr offset sign90DBLC_B 00RWDigital BLC B Channel Offset ValueBit[7:0]:Digital BLC B channel offset value91DBLC_R 00RWDigital BLC R Channel Offset ValueBit[7:0]:Digital BLC R channel offset value92DM_LNL 00RWDummy Line low 8 bitsBit[7:0]:Control insert Dummy line[7:0]93DM_LNH 00RW Dummy Line high 8 bitsBit[7:0]:Control insert Dummy line[15:8]94-9C RSVD XX –Reserved9D LCCFB 00RW Lens Correction B Channel Control 9E LCCFR 00RW Lens Correction R Channel Control 9FDBLC_Gb00RWDigital BLC Gb Channel Offset ValueBit[7:0]:Digital BLC Gb channel offset value A0DBLC_Gr 00RWDigital BLC Gr Channel Offset ValueBit[7:0]:Digital BLC Gr channel offset valueA1AECHM40RWExposure Value - AEC MSB 5 bitsBit[7:6]:ReservedBit[5:0]:AEC[15:10] (see registers AECH for AEC[9:2] and COM1 for AEC[1:0])A2-A3RSVD XX –ReservedA4COM2500RWCommon Control 25Bit[7:0]:ReservedA5COM2600RWCommon Control 26Bit[7:0]:ReservedA6G_GAIN 80RWGreen Gain OptionBit[7:0]:Green gain when using digital AWBA7VGA_ST 14RW Vertical Start Point for VGABit[7:0]:Define vertical start point in VGA sub-windowing modeA8-AAACOMXX–ReservedNOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.Table 7Device Control Register List (Continued)Address (Hex)Register NameDefault (Hex)R/WDescription8.008.00AA1.50s4.507.20s6.20SECTION A-ALensLens HolderKey for image orientationPCBImage PlaneImage Sensor6.606.6010.20Package SpecificationsOMechanical SpecificationsConnector InformationThe OV9650S1G uses a 24-pin socket connector. Table 9 shows a listing of some recommended connectors.Optical SpecificationsTable 8Mechanical DimensionsParameterSpecification CommentsSensor 5.1 mm x 5.72 mm CMOS in housingLensGlass/Plastic Connection Type 10.2 x 10.2 x 4.5 mm SMK socket (consult OmniVision for details)Module Housing8 mm x 8 mm x 7.20 mmTable 9 Recommended ConnectorsManufacturerPart No.DescriptionSMKCLE9024-0201E CLE9024-0301F T-54-10499T-347379-JIGUSocket connector Shield case (optional)Socket without locking mechanism (for testing purposes)Module extraction jigTable 10Optical SpecificationsParameterSpecification CommentsLens Elements Glass/Plastic Hybrid1 glass, 3 plastic (aspheric) fixed focusViewing Angle 60° diagonal Focal Length 4.7 mm F Number 2.8Focus Range 30 cm → ∞FilterIR cut IncludedMount Description M7 x 0.35P TV Distortion 0.51%Focus AdjustmentFixed80 cmOV9650S1GColor CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera ModuleOHandling Precautions•DO NOT try to open the unit enclosure as there is no user-serviceable component inside.•To prevent damage to the camera module by electrostatic discharge, handle the camera module ONLY after discharging ALL static electricity from yourself and ensuring a static-free environment for the camera module.•DO NOT touch the top surface of the lens.•DO NOT press down on the lens.•DO NOT try to focus the lens.•DO NOT put the camera module in a dusty environment.•To reduce the risk of electrical shock and damage to the camera module, turn OFF the power before connect and disconnect the camera module.•DO NOT drop the camera module more than 60 cm onto any hard surface.•To prevent fire or shock hazard, DO NOT expose camera module to rain or moisture.•DO NOT expose camera module to direct sunlight.•DO NOT put camera module in a high temperature environment.•DO NOT use liquid or aerosol cleaners to clean the lens.•DO NOT make any changes or modifications to camera module.•DO NOT subject camera module to strong electromagnetic field.•DO NOT subject the camera module to excessive vibration or shock.WARNING: READ THIS FIRST!Prior to handling any OmniVision camera module, read the following precautions.Handling PrecautionsONote:•All information shown herein is current as of the revision and publication date. Please refer to the OmniVision web site ( ) to obtain the current versions of all documentation.•OmniVision Technologies, Inc. reserves the right to make changes to their products or todiscontinue any product or service without further notice (It is advisable to obtain current product documentation prior to placing orders).•Reproduction of information in OmniVision product documentation and specifications is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. In such cases, OmniVision is not responsible or liable for any information reproduced.•This document is provided with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. Furthermore, OmniVision Technologies Inc. disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this document. No license, expressed or implied, by estoppels or otherwise, to any intellectual property rights is granted herein.•‘OmniVision’, ‘CameraChip’, and ’OmniPixel’ are trademarks of OmniVision Technologies, Inc. All other trade, product or service names referenced in this release may be trademarks orregistered trademarks of their respective holders. Third-party brands, names, and trademarks are the property of their respective owners.For further information, please feel free to contact OmniVision at info@ .OmniVision Technologies, Inc.1341 Orleans Drive Sunnyvale, CA USA (408) 542-3000OV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module O。

NVP2650和NVP2650D
NVP2650和NVP2650D区别之处是后者是双目，前者是单目，目前只有NVP2650+OV2775配套使用，另外一种方案是NVP2650+IMX390,具体区别如下：
一、NVP2650
1、最大分辨率2 m@60fps
2、MIPI支持通用汽车摄像头ISP
3、NVP2650是具有MIPI的FHD@60fps摄像头ISP，支持汽车摄像头所需的选定功能。

NVP2650适用于无极相机、座舱相机、环视监控相机等。

高动态范围支持LFM(LED闪烁抑制)双像素传感器。

关键特性：
1、HDR
2、LFM
3、Full HD
4、先进的信号过滤
适用的线缆：
CVBS LVDS AHD
二、NVP2650D
1、1920 x1280@30fps (ch) 1920 x1080@60fps (1 ch) ISO26262 ASIL-B合规
2、2个isp在一个芯片组
3、符合ISO26262 - ASIL B(汽车安全完整性等级)
2 in 1 -单片机支持2ch。

相机的解决方案配置
分辨率-每个ISP支持2.5M, FHD 2ch.@30fps
功能- LFM(LED闪烁缓解)通过特定的CMOS传感器关键特性：
1、D-WDR：数字宽动态
2、LFM
3、DFOG
4、ASIL-B
5、144BGA （9mm×9mm）传输模式：MIPI
Q-Q:8721-9158
TE-LL:15110-264-988。

ov感光芯片OV感光芯片是一种光电转化器件，它能将光信号转化为电信号。

目前市面上常见的OV感光芯片有OV5648、OV8865等型号，它们都具有高像素、高灵敏度等特点，广泛应用于数码相机、手机摄像头等领域。

OV感光芯片的工作原理是基于光敏二极管的光电效应。

当光照射到芯片上时，光能会激发器件中的载流子，形成一定的电流。

而感光芯片通过读取这个电流的大小，来确定光的强弱和颜色信息。

根据这个原理，OV感光芯片能够将光的信息转化为电信号，进而实现图像的捕捉和处理。

随着科技的不断进步和人们对图像质量要求的提高，OV感光芯片从最开始的低像素、低灵敏度发展到了如今的高像素、高灵敏度。

比如，OV5648是一款500万像素的感光芯片，具有1.4μm的像素尺寸和6400mV/Lux-s的灵敏度。

这使得它能够在低光照条件下获得更好的图像质量，满足用户对高清拍摄的需求。

OV感光芯片的高像素和高灵敏度离不开光学和电子技术的不断进步。

一方面，光学技术的进步让OV感光芯片能够实现更小的像素尺寸，增加感光面积，提高感光能力。

另一方面，电子技术的进步使得OV感光芯片能够更好地处理和传输电信号，提高图像的清晰度和稳定性。

除了高像素和高灵敏度，OV感光芯片还具有一些其他的优势。

首先，它具有较低的功耗和较高的工作效率，能够节约电力资源，延长电池使用时间。

其次，它具有较小的尺寸和较轻的重量，方便集成在各种设备中，如手机、平板电脑等。

此外，在图像的处理和传输方面，OV感光芯片还支持高动态范围(HDR)功能和视频图像稳定器(VIS)功能，提高图像的质量和稳定性。

然而，OV感光芯片也存在一些不足之处。

例如，由于其感光面积有限，当光线较弱或者场景较暗时，图像容易出现噪点和暗部细节不足的问题。

此外，由于OV感光芯片主要应用在手机摄像头领域，对于大型成像设备，如数码相机和监控摄像机等，其像素和灵敏度等性能还有待提高。

总的来说，OV感光芯片作为一种光电转化器件，具有高像素、高灵敏度等优势，被广泛应用于数码相机、手机摄像头等领域。

OV7670-CMOS摄像头使用说 明2014.2.10 参赛平台1.OV7670带FIFO 模块1.简介：OV7670带FIFO 模块，是针对慢速的MCU 能够实现图像采集控制推出的带有缓冲存储空间的一种模块。

这种模块增加了一个FIFO （先进先出）存储芯片，同样包含30w 像素的CMOS 图像感光芯片，3.6mm 焦距的镜头和镜头座，板载CMOS 芯片所需要的各种不同电源（电源要求详见芯片的数据文件），板子同时引出控制管脚和数据管脚，方便操作和使用。

图1.OV7670带FIFO模块 2.管脚定义：参赛平台如图，控制传感器所需的管脚定义如下：3V3-----输入电源电压（推荐使用3.3，5V 也可，但不推荐）GDN-----接地点SIO_C---SCCB 接口的控制时钟（注意：部分低级单片机需要上拉控制，和I2C 接口类似）SIO_D---SCCB 接口的串行数据输入（出）端（注意：部分低级单片机需要上拉控制，和I2C 接口类似） VSYNC---帧同步信号（输出信号）HREF----行同步信号（输出信号）PCLK----像素时钟（输出信号）XCLCK---时钟信号（输入信号）D0-D7---数据端口（输出信号）RESTE---复位端口（正常使用拉高）PWDN----功耗选择模式（正常使用拉低）STROBE—拍照闪光控制端口（正常使用可以不需要）FIFO_RCK---FIFO 内存读取时钟控制端FIFO_WR_CTR----FIFO 写控制端(1为允许CMOS 写入到FIFO，0为禁止) FIFO_OE----FIFO 关断控制FIFO_WRST—FIFO 写指针服务端FIFO_RRST—FIFO 读指针复位端 参赛平台图7.FIFO摄像头接口定义3.控制方式说明由于采用了FIFO 做为数据缓冲，数据采集大大简便，用户只需要关心是如何读取即可，不需要关心具体数据是如何采集到的，这样可减小甚至不用关心CMOS 的控制以及时序关系，就能够实现图像的采集。

Contents一、手机CAMERA的物理结构：........................................................................................ - 4 -二、 CAMERA 的成像原理： ................................................................................................. - 4 -三、 CAMERA 常见的数据输出格式：.................................................................................. - 5 -四、阅读CAMERA的规格书（以TRULY模组OV5647_RAW为例）：........................... - 6 -五、 CAMERA 的硬件原理图及引脚 ..................................................................................... - 7 -1、电源部分：.................................................................................................................... - 7 -2、 S ENSOR I NPUT部分：................................................................................................... - 7 -3、 S ENSOR O UT P UT部分：............................................................................................... - 7 -4、 I2C 部分：SCL，I2C时钟信号线和SDA，I2C数据信号线。

废话后面说，先直接上OV7670寄存器的配置部分const uint8_t OV7670_Reg[][2]={//Frame Rate Adjustment for 24Mhz input clock//30fps PCLK=24MHz{0x11, 0x80},//软件应用手册上设置的是0x80，例程设置的是0x00{0x6b, 0x0a},//PLL控制,软件应用手册上设置的是0x0a,例程设置的是0x40,将PLL调高的话就会产生花屏{0x2a, 0x00},{0x2b, 0x00},{0x92, 0x00},{0x93, 0x00},{0x3b, 0x0a},//Output format{0x12, 0x14},//QVGA(320*240)、RGB//RGB555/565 option(must set COM7[2] = 1 and COM7[0] = 0){0x40, 0x10},//RGB565,effective only when RGB444[1] is low{0x8c, 0x00},//Special effects - 特效//normal{0x3a, 0x04},{0x67, 0xc0},{0x68, 0x80},//Mirror/VFlip Enable - 水平镜像/竖直翻转使能{0x1e, 0x37},//修改配置值将产生图像显示上下或左右颠倒//Banding Filter Setting for 24Mhz Input Clock - 条纹滤波器//30fps for 60Hz light frequency//{0x13, 0xe7},//banding filer enable//{0x9d, 0x98},//50Hz banding filer//{0x9e, 0x7f},//60Hz banding filer//{0xa5, 0x02},//3 step for 50Hz//{0xab, 0x03},//4 step for 60Hz//{0x3b, 0x02},//select 60Hz banding filer//Simple White Balance - 白平衡//{0x13, 0xe7},//AWB、AGC、AGC Enable and ...//{0x6f, 0x9f},//simple AWB//AWBC - 自动白平衡控制(Automatic white balance control)//{0x43, 0x14},//用户手册里这些寄存器的值都是保留(Reserved),不用设置的呀？//{0x44, 0xf0},//{0x45, 0x34},//{0x46, 0x58},//{0x47, 0x28},//{0x48, 0x3a},//AWB Control//{0x59, 0x88},//用户手册连寄存器都是保留，初始值都没提供//{0x5a, 0x88},//{0x5b, 0x44},//{0x5c, 0x67},//{0x5d, 0x49},//{0x5e, 0x0e},//AWB Control//{0x6c, 0x0a},//{0x6d, 0x55},//{0x6e, 0x11},//{0x6f, 0x9f},//AGC/AEC - Automatic Gain Control自动增益补偿/Automatic exposure Control自动曝光控制//{0x00, 0x00},//{0x14, 0x20},//{0x24, 0x75},//{0x25, 0x63},//{0x26, 0xA5},//AEC algorithm selection - AEC公式选择//{0xaa, 0x94},//基于平均值的AEC算法Average-based AEC algorithm/基于直方图的AEC算法Histogram-based AEC algorithm//基于直方图的AGC/AEC的控制//{0x9f, 0x78},//{0xa0, 0x68},//{0xa6, 0xdf},//{0xa7, 0xdf},//{0xa8, 0xf0},//{0xa9, 0x90},//Fix Gain Control - 固定增益控制//{0x69, 0x5d},//Fix gain for Gr channel/for Gb channel/for R channel/for B channel//Color saturation 颜色饱和度+ 0//{0x4f, 0x80},//{0x50, 0x80},//{0x51, 0x00},//{0x52, 0x22},//{0x53, 0x5e},//{0x54, 0x80},//{0x58, 0x9e},//Brightness - 亮度+ 0//{0x55, 0x00},//Contrast - 对比度+ 0//{0x56, 0x40},//Gamma Curve - 伽马曲线//{0x7a, 0x20},//{0x7b, 0x1c},//{0x7c, 0x28},//{0x7d, 0x3c},//{0x7e, 0x55},//{0x7f, 0x68},//{0x80, 0x76},//{0x81, 0x80},//{0x82, 0x88},//{0x83, 0x8f},//{0x84, 0x96},//{0x85, 0xa3},//{0x86, 0xaf},//{0x87, 0xc4},//{0x88, 0xd7},//{0x89, 0xe8},//Matrix Coefficient - 色彩矩阵系数//{0x4f, 0x80},//{0x50, 0x80},//{0x51, 0x00},//{0x52, 0x22},//{0x53, 0x5e},//{0x54, 0x80},//Lens Correction Option - 镜头补偿选项 //{0x62, 0x00},//{0x63, 0x00},//{0x64, 0x04},//{0x65, 0x20},//{0x66, 0x05},//{0x94, 0x04},//effective only when LCC5[2] is high//{0x95, 0x08},//effective only when LCC5[2] is high//注释这些配置的话，就倾斜显示，并显示多块，这到底是控制什么的？跟时序图有关？{0x17, 0x16},//行频Horizontal Frame开始高八位(低三位在HREF[2：0]){0x18, 0x04},//行频Horizontal Frame结束高八位(低三位在HREF[5：3]){0x19, 0x02},//场频Vertical Frame开始高八位(低二位在VREF[1：0]){0x1a, 0x7b},//场频Vertical Frame结束高八位(低二位在VREF[3：2]){0x32, 0x80},//HREF{0x03, 0x06},//VREF//注释这个配置的话，就显示花屏了{0x15, 0x02},//配置PCLK、HREF、VSYNC相关//Automatic black Level Compensation - 自动黑电平校正{0xb0, 0x84},//调试时注释这项配置时，颜色显示不正常了，红色练绿色，绿色变红色，但用户手册对这寄存器是保留RSVD//{0xb1, 0x0c},//{0xb2, 0x0e},//{0xb3, 0x82},//{0xb8, 0x0a},//SCALING_xx寄存器//{0x70, 0x00},//{0x71, 0x00},//{0x72, 0x11},//{0x73, 0x08},//{0x3e, 0x00},//ADC//{0x37, 0x1d},//ADC控制ADC Control//{0x38, 0x71},//ADC和模拟共模控制ADC and Analog Common Mode Control//{0x39, 0x2a},//ADC偏移控制ADC Offset Control//零杂的寄存器//{0x92, 0x00},//空行低八位Dummy Line low 8 bits//{0xa2, 0x02},//像素时钟延时//{0x0c, 0x0c},//{0x10, 0x00},//{0x0d, 0x01},//{0x0f, 0x4b},//{0x3c, 0x78},//{0x74, 0x19},//用户手册里这几个寄存器都是保留RSVD//{0x0e, 0x61},//{0x16, 0x02},//{0x21, 0x02},//{0x22, 0x91},//{0x29, 0x07},//{0x33, 0x0b},//{0x35, 0x0b},//{0x4d, 0x40},//{0x4e, 0x20},//{0x8d, 0x4f},//{0x8e, 0x00},//{0x8f, 0x00},//{0x90, 0x00},//{0x91, 0x00},//{0x96, 0x00},//{0x9a, 0x80},};刚开始学OV7670摄像头，我想大家跟我一样心里很毛躁吧，一个模块需要你配置100多个寄存器，但用户手册对寄存器的介绍却草草的一笔带过，自己无从下手啊，只能看开发板给的例程和上网找一些大虾的帖子了。

基于2.6.35内核的OV9650摄像头驱动移植一、移植环境：【移植环境】1、主机：Ubuntu 10.10发行版2、目标机：FS_S5PC100平台3、交叉编译工具：arm-none-linux-gnueabi-4.5.14、摄像头模块：OV96505、Linux文件系统：rootfs. cramfs.6、内核：linux-2.6.35-farsigt二、内核配置1.修改vi drivers/i2c/busses/Kconfig（参考实验二十六I2C驱动编写及测试）修改config I2C_S3C2410tristate "S3C2410 I2C Driver"depends on ARCH_S3C2410 || ARCH_S3C64XXhelpSay Y here to include support for I2C controller in theSamsung S3C2410 based System-on-Chip devices.为：config I2C_S3C2410tristate "S3C2410 I2C Driver"depends on ARCH_S3C2410 || ARCH_S3C64XX || ARCH_S5PC100helpSay Y here to include support for I2C controller in theSamsung S3C2410 based System-on-Chip devices.2.内核配置并重新编译内核$ make menuconfigDevice Drivers ---><*> I2C support ---><*> I2C device interfaceI2C Hardware Bus support ---><*> S3C2410 I2C Driver3.修改vi arch/arm/mach-s5pc100/mach-smdkc100.c查看原理图可以知道我们的摄像头是接在I2C-1上所以修改i2c_devs1添加ov9650的内容，主要是ov9650的地址，这个在芯片手册上可以查到是0x30修改：static struct i2c_board_info i2c_devs1[] __initdata = {};为：static struct i2c_board_info i2c_devs1[] __initdata = {{I2C_BOARD_INFO("ov9650", 0x30),},};添加s5pc100 摄像头控制器平台设备相关内容，这些内容我们可以通过查看S5PC100的芯片手册查到static struct resource s3c_camif_resource[] = {[0] = {.start = 0xEE200000,.end = 0xEE200000 + SZ_1M - 1,.flags = IORESOURCE_MEM,},[1] = {.start = IRQ_FIMC0,.end = IRQ_FIMC0,.flags = IORESOURCE_IRQ,}};static u64 s3c_device_camif_dmamask = 0xffffffffUL;struct platform_device s3c_device_camif = {.name = "s5pc100-camif",.id = 0,.num_resources = ARRAY_SIZE(s3c_camif_resource),.resource = s3c_camif_resource,.dev = {.dma_mask = &s3c_device_camif_dmamask,.coherent_dma_mask = 0xffffffffUL}};EXPORT_SYMBOL(s3c_device_camif);注册摄像头控制平台设备：在smdkc100_devices中添加s3c_device_camifstatic struct platform_device *smdkc100_devices[] __initdata = {&s3c_device_camif, //添加内容};4. 添加驱动（video）Make menuconfigDevice Drivers ---><*> Multimedia support ---><*> Video For Linux[*] Enable Video For Linux API 1 (DEPRECATED) (NEW)[*] Video capture adapters (NEW) --->[*] V4L USB devices (NEW) ---><*> USB Video Class (UVC)[*] UVC input events device support (NEW)<*> USB ZC0301[P] webcam support (DEPRECA TED)三、驱动编写四、网络视频服务器移植对于内核linux-2.6.35，不能再使用servfox，如果要使用的需要修改大量的代码，在此选用新的方法来移植。

OV7690照相模组硬件应用指南修改日期：2008-08-29版本: 1.00OmniVision Technologies, Inc. 保留对文件的修改权，为提高产品的可靠性、功能、设计，进行修改，可不给出过多注释.这个文件包含版权信息. 文件只能给那些获得OmniVision Technologies, Inc. 批准的员工、组织、团体使用。

Table of Contents1. OV7690 模组参考设计 (3)2. OV7690 模组接口参考设计 (4)2.1 引脚定义 (4)2.2 电源供给 (4)3. OV7690 模组操作 (5)3.1 节电模式 (5)3.2 Camera 工作在低功耗节电模式 (5)3.2.1 上电，软件复位 (5)3.2.2 由低功耗节电模式恢复工作 (6)3.2.3 进入低功耗节电模式 (6)3.3 照相模组工作在断电的节电模式 (7)3.3.1 上电 (7)3.3.2 打开摄像头, 软件复位 (7)3.3.3关闭摄像头 (7)4. SCCB总线共享 (8)5. 手机上PCB 设计时序的考虑 (8)5.1 PCLK采样 (9)5.2 使用 EMI/ESD 器件 (10)6. 硬件检测 (10)6.1 检查硬件设计 (10)6.1.1 模组功能 (10)6.1.2 检查手机照相模组接口 (10)6.2 检查照相模组是否工作 (10)6.3 检查SCCB (11)6.4 检查照相模组接口 (11)6.5 常见问题 (12)6.6 图片方向 (13)6.6.1 摄像头 4:3, LCD 3:4 (13)6.6.2 摄像头 3:4, LCD 3:4 (13)6.7 检查颜色 (14)6.8 检测图像中心 (14)1. OV7690 模组参考设计注:如果PWDN引脚不使用，应连到地.DOVDD 应在1.7V ~ 3.0V范围内. AVDD应在2.6V ~ 3.0V范围内.AGND和 DOGND 在模组内应分开, 在模组外手机PCB上连到一点.2. OV7690 模组接口参考设计2.1 引脚定义OV7689视频口有八根数据线, D[7:0]，它支持的数据格式有8位 RGB raw 输出, 8位 YcbCr 输出, 8位 RGB 565/555/444 输出。

Advanced Information Preliminary DatasheetO mniTMisionOV9650S1G Color CMOS SXGA (1.3 MegaPixel) with OmniPixel TM TechnologyConcept Camera Module for Socket SolutionGeneral DescriptionKey SpecificationsOV9650S1GColor CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera ModuleO Functional DescriptionFigure 2 shows the functional block diagram of the OV9650S1G Camera Module. The OV9650S1G includes:•1/4" lens •OV9650 C AMERA C HIP image sensor •Socket connectorFigure 2 Functional Block DiagramFunctional DescriptionOImaging SpecificationsNOTE: OV9650S1G features the OV9650 C AMERA C HIP . Refer to the OV9650 Datasheet for chip-specific information.Table 1Sensor Image FunctionsSensor Imaging Functions DescriptionAuto ExposureModule automatically sets correct exposure time.Auto Exposure ON/OFF Auto exposure can be turned off so the exposure can be set manually.Auto White Balance (AWB)AWB without companion processor interaction.Auto White Balance OFF AWB can be turned off.Color CorrectionIt is possible to adjust for the color filter response of the image sensor as well as for human eye sensitivity.Bayer Pattern Interpolation (Mosaic or equivalent) The interpolation must be done prior to downsizing the image to avoid artifacts due to incorrect interpolation.Electrical Illumination Flicker Elimination Interference from 50Hz or 60Hz illumination can be suppressed with manually set frame rate divider.Gamma Correction Built-in 0.45/1.0Color Space Conversion Bayer raw RGB is converted to YCbCr/YUV color space.Image Size Decimation Size can be altered using the windowing registers. Quarter-format sub-sampling is also provided.Image ON/OFF Image ON/OFF can be controlled by register settings.RGB Output RGB raw data output available.AGC Gain Automatic Gain Control (AGC)White BalanceAutomatic White BalanceTable 2 Output SpecificationsOutput Image FormatsDescriptionOutput Formats SXGA (1280 x 1024 pixels)VGA (640 x 480 pixels)YUV Format 4:2:2 compliant with CCIR656YUV OrderYUYV or UYVYEmbedded Sync Codes Sync signals coded in with data output (CCIR656) or output separately.Data ClippingAccording to CCIR656 or no clipping.Format in Decimation ModePCLK verifies whether or not there is data on every cycle.OV9650S1GColor CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera ModuleOPin DescriptionNOTE:Y[9:2] for 8-bit YUV or RGB (Y9 MSB, Y2 LSB)Y[9:0] for 10-bit RGB (Y9 MSB, Y0 LSB)Table 3Pin DescriptionPin NumberName Pin Type Function/Description01VSYNC Output Vertical sync output 02HREF Output HREF output 03PCLK Output Pixel clock output04DOVDD Power Digital power supply (V DD-IO = 2.5 to 3.3 VDC) for I/O05RESET Function (default = 0)Clears all registers and resets them to their default values. Active high, internal pull-down resistor.06Y9Output Output bit[9] - MSB for 10-bit RGB and 8-bit YUV 07Y7Output Output bit[7]08Y8Output Output bit[8]09Y6Output Output bit[6]10DGND Power Digital ground11Y1Output Output bit[1] - for 10-bit RGB only 12Y3Output Output bit[3]13Y5Output Output bit[5]14Y4Output Output bit[4]15Y2Output Output bit[2] - LSB for 8-bit YUV 16SIO_D I/O SCCB serial interface data I/O17AVDD Power Analog power supply (V DD-A = 2.45 to 2.8 VDC)18AGND Power Analog ground 19NC–Reserved - no connect20PWDNFunction (default = 0)Power Down Mode Selection - active high, internal pull-down resistor.0:Normal mode1:Power down mode 21SIO_C Input SCCB serial interface clock input22DVDD Power Power supply (V DD-C = 1.8 VDC + 10%) for digital core logic 23XVCLK1Input Crystal clock input24Y0OutputOutput bit[0] - LSB for 10-bit RGB onlyElectrical CharacteristicsOElectrical CharacteristicsNOTE:Exceeding the Absolute Maximum ratings shown above invalidates all AC and DC electrical specifications and may result in permanent device damage.Table 4Absolute Maximum RatingsAmbient Storage Temperature-40ºC to +95ºCSupply Voltages (with respect to Ground)V DD-A4.5 V V DD-C 3 V V DD-IO4.5 VAll Input/Output Voltages (with respect to Ground)-0.3V to V DD-IO +1V Lead Temperature, Surface-mount process +230ºC ESD Rating, Human Body model 2000VTable 5DC Characteristics (-20°C < T A < 70°C)Symbol ParameterConditionMin Typ Max Unit V DD-A DC supply voltage – Analog – 2.45 2.5 2.8V V DD-C DC supply voltage – Core – 1.62 1.8 1.98V V DD-IO DC supply voltage – I/O power – 2.25– 3.6V I DDA Active (Operating) Current See Note a a. V DD-A = 2.5V, V DD-C = 1.8V, V DD-IO = 3.0VI DDA = ∑{I DD-IO + I DD-C + I DD-A }, f CLK = 24MHz at 7.5 fps YUV output, no I/O loading20mA I DDS-SCCB Standby Current See Note b b. V DD-A = 2.5V, V DD-C = 1.8V, V DD-IO = 3.0VI DDS:SCCB refers to a SCCB-initiated Standby, while I DDS:PWDN refers to a PWDN pin-initiated Standby 1mA I DDS-PWDN Standby Current 10µA V IH Input voltage HIGH CMOS0.7 x V DD-IOV V IL Input voltage LOW 0.3 x V DD-IOV V OH Output voltage HIGH CMOS0.9 x V DD-IOV V OL Output voltage LOW 0.1 x V DD-IOV I OH Output current HIGH See Note cc.Standard Output Loading = 25pF, 1.2K Ω8mA I OL Output current LOW 15mA I LInput/Output LeakageGND to V DD-IO ± 1µAOV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module OTable 6 Functional and AC Characteristics (-20°C < T A < 70°C)Symbol Parameter Min Typ Max Unit Functional CharacteristicsA/D Differential Non-Linearity+ 1/2LSBA/D Integral Non-Linearity+1LSBAGC Range18dBRed/Blue Adjustment Range12dB Inputs (PWDN, CLK, RESET)f CLK Input Clock Frequency102448MHzt CLK Input Clock Period2142100ns t CLK:DC Clock Duty Cycle455055% t S:RESET Setting time after software/hardware reset1ms t S:REG Settling time for register change (10 frames required)300ms SCCB Timing (see Figure4)f SIO_C Clock Frequency400KHzt LOW Clock Low Period 1.3µs t HIGH Clock High Period600ns t AA SIO_C low to Data Out valid100900ns t BUF Bus free time before new START 1.3µs t HD:STA START condition Hold time600ns t SU:STA START condition Setup time600ns t HD:DAT Data-in Hold time0µs t SU:DAT Data-in Setup time100ns t SU:STO STOP condition Setup time600ns t R, t F SCCB Rise/Fall times300ns t DH Data-out Hold time50ns Outputs (VSYNC, HREF, PCLK, and Y[9:0] (see Figure5, Figure6, Figure7, Figure8, Figure10, and Figure11) t PDV PCLK[↓] to Data-out Valid5ns t SU Y[9:0] Setup time15ns t HD Y[9:0] Hold time8ns t PHH PCLK[↓] to HREF[↑]05ns t PHL PCLK[↓] to HREF[↓]05nsAC Conditions:• V DD: V DD-C = 1.8V, V DD-A = 2.5V, V DD-IO = 3.0V • Rise/Fall Times: I/O: 5ns, MaximumSCCB: 300ns, Maximum • Input Capacitance: 10pf• Output Loading: 25pF, 1.2KΩ to 3V• f CLK: 24MHzTiming SpecificationsOTiming SpecificationsFigure 4 SCCB Timing DiagramOV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module OFigure 7 VGA Frame TimingTiming SpecificationsOFigure 10 CIF Frame TimingOV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module OFigure 13 RGB 565 Output Timing DiagramRegister Set Table7 shows detailed descriptions of the Device Control registers. The device slave addresses for the OV9650S1G are 60 for write and 61 for read.Table 7 Device Control Register ListAddress (Hex)RegisterNameDefault(Hex)R/W Description00GAIN00RW AGC[7:0] – Gain control gain setting •Range: [00] to [FF]01BLUE80RW AWB – Blue channel gain setting •Range: [00] to [FF]02RED80RW AWB – Red channel gain setting •Range: [00] to [FF]03VREF12RW Vertical Frame ControlBit[7:6]:AGC[9:8] (see register GAIN for AGC[7:0])Bit[5:3]:VREF end low 3 bits (high 8 bits at VSTOP[7:0] Bit[2:0]:VREF start low 3 bits (high 8 bits at VSTRT[7:0]04COM100RW Common Control 1Bit[7]:ReservedBit[6]:CCIR656 formatBit[5]:QQVGA or QQCIF format. Effective only when QVGA or QCIF output is selected (register bit COM7[4]) and relatedHREF skip mode based on format is selected (registerCOM1[3:2])Bit[4]:ReservedBit[3:2]:HREF skip option00:No skip01:YUV/RGB skip every other row for YUV/RGB, skip 2rows for every 4 rows for Raw data1x:Skip 3 rows for every 4 rows for YUV/RGB, skip 6 rowsfor every 8 rows for Raw dataBit[1:0]:AEC low 2 LSB (see registers AECHM for AEC[15:10] and AECH for AEC[9:2])05BAVE00RW U/B Average LevelAutomatically updated based on chip output format06GEAVE00RW Y/Ge Average LevelAutomatically updated based on chip output format07RSVD00–Reserved08RAVE00RW V/R Average LevelAutomatically updated based on chip output format09COM201RW Common Control 2Bit[7:5]:ReservedBit[4]:Soft sleep modeBit[3:2]:ReservedBit[1:0]:Output drive capability00:1x01:2x10:2x11:4x0A PID96R Product ID Number MSB (Read only) 0B VER50R Product ID Number LSB (Read only)0C COM300RW Common Control 3Bit[7]:ReservedBit[6]:Output data MSB and LSB swapBit[5:4]:ReservedBit[3]:Pin selection1:Change RESET pin to EXPST_B (frame exposuremode timing) and change PWDN pin to FREX (frameexposure enable)Bit[2]:VarioPixel for VGA and CIFBit[1]:ReservedBit[0]:Single frame output (used for Frame Exposure mode only)0D COM400RW Common Control 4Bit[7]:VarioPixel for QVGA, QCIF, QQVGA, and QQCIFBit[6]:ReservedBit[5]:Pixels for sub-sampling mode0:Get average neighbor pixel in sub-sampling mode1:Get sum instead of average neghbor pixel insub-sampling modeBit[4:3]:ReservedBit[2]:Tri-state option for output clock at power-down period 0:Tri-state at this period1:No tri-state at this periodBit[1]:Tri-state option for output data at power-down period 0:Tri-state at this period1:No tri-state at this periodBit[0]:Reserved(Hex)Name(Hex)R/W Description0E COM501RW Common Control 5Bit[7]:System clock selection. If the system clock is 48 MHz, this bit should be set to high to get 15 fps for YUV or RGB Bit[6:5]:ReservedBit[4]:Slam mode enable0:Master mode1:Slam mode (used for slave mode)Bit[3]:ADC offset manual control0:Offset is controlled automatically1:Register OFON[7:4] can enable ADC offset addition Bit[2:1]:ReservedBit[0]:Exposure step can be set longer than VSYNC time1:In Normal mode, AEC changes by 1/16 and in Fastmode, AEC changes by double0F COM643RW Common Control 6Bit[7]:Output of optical black line option0:Disable HREF at optical black1:Enable HREF at optical black Bit[6:5]:ReservedBit[4]:HREF is high from optical black lineBit[3]:Enable bias for ADBLCBit[2]:ADBLC offset0:Use 4-channel ADBLC1:Use 2-channel ADBLCBit[1]:Reset all timing when format changes Bit[0]:Enable ADBLC option10AECH40RW Exposure ValueBit[7:0]:AEC[9:2] (see registers AECHM for AEC[15:10] and COM1 for AEC[1:0])11CLKRC00RW Data Format and Internal ClockBit[7]:Digital PLL option0:Disable double clock option, meaning the maximumPCLK can be as high as half input clock1:Enable double clock option, meaning the maximumPCLK can be as high as input clockBit[6]:Use external clock directly (no clock pre-scale available) Bit[5:0]:Internal clock pre-scalarF(internal clock) = F(input clock)/(Bit[5:0]+1)•Range: [0 0000] to [1 1111](Hex)Name(Hex)R/W Description12COM700RW Common Control 7Bit[7]:SCCB Register Reset0:No change1:Resets all registers to default valuesBit[6]:Output format - VGA selectionBit[5]:Output format - CIF selectionBit[4]:Output format - QVGA selectionBit[3]:Output format - QCIF selectionBit[2]:Output format - RGB selectionBit[1]:ReservedBit[0]:Output format - Raw RGB (COM7[2] must be set high)13COM88F RW Common Control 8Bit[7]:Enable fast AGC/AEC algorithmBit[6]:AEC - Step size limit (used only in fast condition and COM5[0] is low)0:Fast condition change maximum step is VSYNC1:Unlimited step sizeBit[5]:Banding filter ON/OFFBit[4]:ReservedBit[3]:Enable AEC time can be less than 1 line optionBit[2]:AGC EnableBit[1]:AWB EnableBit[0]:AEC Enable14COM94A RW Common Control 9Bit[7]:ReservedBit[6:4]:Automatic Gain Ceiling - maximum AGC value000:2x001:4x010:8x011:16x100:32x101:64x110:128xBit[3]:Exposure timing can be less than limit of banding filter when light is too strongBit[2]:Data format - VSYNC drop option0:VSYNC always exists1:VSYNC will drop when frame data drops Bit[1]:Enable drop frame when AEC step is larger than VSYNC Bit[0]:Freeze AGC/AEC(Hex)Name(Hex)R/W Description15COM1000RW Common Control 10Bit[7]:Set pin definition1:Set RESET to SLHS (slave mode horizontal sync) andset PWDN to SLVS (slave mode vertical sync) Bit[6]:HREF changes to HSYNCBit[5]:PCLK output option0:PCLK always output1:No PCLK output when HREF is lowBit[4]:PCLK reverseBit[3]:HREF reverseBit[2]:Reset signal end point optionBit[1]:VSYNC negativeBit[0]:HSYNC negative16RSVD00–Reserved17HSTART1A RW Output Format - Horizontal Frame (HREF column) start high 8-bit (low 3bits are at HREF[2:0])18HSTOP BA RW Output Format - Horizontal Frame (HREF column) end high 8-bit (low 3bits are at HREF[5:3])19VSTRT01RW Output Format - Vertical Frame (row) start high 8-bit (low 2 bits are at VREF[1:0])1A VSTOP81RW Output Format - Vertical Frame (row) end high 8-bit (low 2 bits are at VREF[3:2])1B PSHFT00RW Data Format - Pixel Delay Select (delays timing of the Y[9:0] data relative to HREF in pixel units)•Range: [00] (no delay) to [FF] (256 pixel delay which accounts for whole array)1C MIDH7F R Manufacturer ID Byte – High(Read only = 0x7F) 1D MIDL A2R Manufacturer ID Byte – Low(Read only = 0xA2)1E MVFP00RW Mirror/VFlip EnableBit[7:6]:ReservedBit[5]:Mirror0:Normal image1:Mirror image Bit[4]:VFlip enable0:VFlip disable1:VFlip enable Bit[3:0]:Reserved1F LAEC00RW Reserved20BOS80RW B Channel ADBLC ResultBit[7]:Offset adjustment sign0:Add offset1:Subtract offsetBit[6:0]:Offset value of 10-bit range (high 7 bits)(Hex)Name(Hex)R/W Description21GBOS80RW Gb channel ADBLC resultBit[7]:Offset adjustment sign0:Add offset1:Subtract offsetBit[6:0]:Offset value of 10-bit range22GROS80RW Gr channel ADBLC resultBit[7]:Offset adjustment sign0:Add offset1:Subtract offsetBit[6:0]:Offset value of 10-bit range23ROS80RW R channel ADBLC resultBit[7]:Offset adjustment sign0:Add offset1:Subtract offsetBit[6:0]:Offset value of 10-bit range24AEW78RW AGC/AEC - Stable Operating Region (Upper Limit) 25AEB68RW AGC/AEC - Stable Operating Region (Lower Limit)26VPT D4RW AGC/AEC Fast Mode Operating Region Bit[7:4]:Upper limit of 4 MSBBit[3:0]:Lower limit of 4 LSB27BBIAS80RW B Channel Signal Output Bias (effective only when COM6[0] = 1)Bit[7]:Bias adjustment sign0:Add bias1:Subtract biasBit[6:0]:Bias value of 10-bit range28GbBIAS80RW Gb Channel Signal Output Bias (effective only when COM6[0] = 1) Bit[7]:Bias adjustment sign0:Add bias1:Subtract biasBit[6:0]:Bias value of 10-bit range29Gr_COM00RW Analog BLC and Regulator Control Bit[7:6]:ReservedBit[5]:Bypass Analog BLCBit[4]:Bypass regulatorBit[3:0]:Reserved2A EXHCH00RW Dummy Pixel Insert MSBBit[7:4]: 4 MSB for dummy pixel insert in horizontal direction Bit[3:2]:HSYNC falling edge delay 2 MSBBit[1:0]:HSYNC rising edge delay 2 MSB2B EXHCL00RW Dummy Pixel Insert LSB8 LSB for dummy pixel insert in horizontal direction(Hex)Name(Hex)R/W Description2C RBIAS80RW R Channel Signal Output Bias (effective only when COM6[0] = 1) Bit[7]:Bias adjustment sign0:Add bias1:Subtract biasBit[6:0]:Bias value of 10-bit range2D ADVFL00RW LSB of insert dummy lines in vertical direction (1 bit equals 1 line) 2E ADVFH00RW MSB of insert dummy lines in vertical direction2F YAVE00RW Y/G Channel Average Value30HSYST08RW HSYNC Rising Edge Delay (low 8 bits)31HSYEN30RW HSYNC Falling Edge Delay (low 8 bits)32HREF A4RW HREF ControlBit[7:6]:HREF edge offset to data outputBit[5:3]:HREF end 3 LSB (high 8 MSB at register HSTOP) Bit[2:0]:HREF start 3 LSB (high 8 MSB at register HSTART)33CHLF00RW Bit[7:0]:Reserved 34ARBLM03RW Bit[7:0]:Reserved 35-36RSVD XX–Reserved37ADC04RW Bit[7:0]:Reserved 38ACOM12RW Bit[7:0]:Reserved39OFON00RW Bit[7:4]:ReservedBit[3]:Line buffer power down - must be set to "1" before chip power downBit[2:0]:Reserved3A TSLB0C RW Line Buffer Test OptionBit[7:6]:ReservedBit[5]:Bit-wise reverseBit[4]:UV output value0:Use normal UV output1:Use fixed UV value set in registers MANU and MANVas UV output instead of chip outputBit[3]:Output sequence is Y U Y V instead of U Y V YBit[2]:Output sequence is Y V Y U instead of Y U Y VBit[1]:ReservedBit[0]:Digital BLC(Hex)Name(Hex)R/W Description3B COM1100RW Common Control 11Bit[7]:Night mode0:Night mode disable1:Frame rate will adjust based on COM11[6:5] beforeAGC gain increases more than 2. Also,ADVFL andADVFL will be automatically updated.Bit[6:5]:Night mode insert frame option00:Normal frame rate01:1/2 frame rate10:1/4 frame rate11:1/8 frame rateBit[4:3]:Average calculation window option00:Use full frame01:Use half frame10:Use quarter frame11:Use lower two-thirdsBit[2:1]:ReservedBit[0]:Manual banding filter mode3C COM1240RW Common Control 12Bit[7]:HREF option0:No HREF when VREF is low1:Always has HREFBit[6:3]:ReservedBit[2]:Enable YUV averageBit[1:0]:Reserved3D COM1399RW Common Control 13Bit[7:6]:Gamma selection for signal00:No gamma function01:Gamma used for Y channel only10:Gamma used for Raw data before interpolation11:Not allowedBit[5]:ReservedBit[4]:Enable color matrix for RGB or YUVBit[3]:Enable Y channel delay option0:Delay UV channel1:Delay Y channelBit[2:0]:Output Y/UV delay3E COM140E RW Common Control 14Bit[7:2]:ReservedBit[1]:Enable edge enhancement for YUV output (effective only for YUV/RGB, no use for Raw data)Bit[0]:Edge enhancement option0:Edge enhancement factor = EDGE[3:0]1:Edge enhancement factor = 2 x EDGE[3:0](Hex)Name(Hex)R/W Description3F EDGE88RW Edge Enhancement AdjustmentBit[7:4]:Edge enhancement threshold[3:0](see register COM22[7:6} for Edge threshold[5:4]) Bit[3:0]:Edge enhancement factor40COM15C0RW Common Control 15Bit[7:6]:Data format - output full range enable0x:Output range: [10] to [F0]10:Output range: [01] to [FE]11:Output range: [00] to [FF]Bit[5:4]:RGB 555/565 option (must set COM7[2] high) x0:Normal RGB output01:RGB 56511:RGB 555Bit[3]:Swap R/B in RGB565/RGB555 formatBit[2:0]:Reserved41COM1610RW Common Control 16Bit[7:2]:ReservedBit[1]:Color matrix coefficient double option Bit[0]:Reserved42COM1708RW Common Control 17Bit[7:5]:ReservedBit[4]:Edge enhancement optionBit[3]:ReservedBit[2]:Select single frame outBit[1]:Tri-state outputBit[0]:Reserved43-4E RSVD XX–Reserved4F MTX158RW Matrix Coefficient 1 50MTX248RW Matrix Coefficient 2 51MTX310RW Matrix Coefficient 3 52MTX428RW Matrix Coefficient 4 53MTX548RW Matrix Coefficient 5 54MTX670RW Matrix Coefficient 6 55MTX740RW Matrix Coefficient 7 56MTX840RW Matrix Coefficient 8 57MTX940RW Matrix Coefficient 958MTXS0F RW Matrix Coefficient Sign for coefficient 9 to 2 0:Plus1:Minus59-61RSVD XX–Reserved(Hex)Name(Hex)R/W Description62LCC100RW Lens Correction Option 163LCC200RW Lens Correction Option 264LCC310RW Lens Correction Option 365LCC480RW Lens Correction Option 466LCC500RW Lens Correction Control67MANU80RW Manual U Value (effective only when register TSLB[4] is high) 68MANV80RW Manual V Value (effective only when register TSLB[4] is high)69HV00RW Manual Banding Filter MSBBit[7:1]:ReservedBit[0]:Matrix coefficient 1 sign6A MBD00RW LSB of Banding Filter Value (effective only when COM11[0] is high). 6B DBLV0A RW Bit[7:0]:Reserved6C-7B GSP XX RW Gamma curve7C-8A GST XX RW Gamma curve8B COM2104RW Common Control 21Bit[7:4]:ReservedBit[3]:VGA option - use VGA window modeBit[2]:ReservedBit[1]:Digital BLC optionBit[0]:UV channel uses sum or average of neighbor pixel in sub-sampling mode8C COM2200RW Common Control 22Bit[7:6]:Edge enhancement threshold[5:4](see register EDGE[7:4} for Edge threshold[3:0]) Bit[5]:De-noise enableBit[4:2]:ReservedBit[1]:White-pixel erase enableBit[0]:White-pixel erase option8D COM2300RW Common Control 23Bit[7:5]:ReservedBit[4]:Color bar test modeBit[3:2]:ReservedBit[1]:Digital AWB enableBit[0]:Reserved8E COM2400RW Common Control 24Bit[7:0]:Reserved(Hex)Name(Hex)R/W DescriptionRegister SetO8F DBLC10F RWDigital BLC Offset SignBit[7:4]:ReservedBit[3]:Digital BLC B offset sign Bit[2]:Digital BLC R offset sign Bit[1]:Digital BLC Gb offset sign Bit[0]:Digital BLC Gr offset sign90DBLC_B 00RWDigital BLC B Channel Offset ValueBit[7:0]:Digital BLC B channel offset value91DBLC_R 00RWDigital BLC R Channel Offset ValueBit[7:0]:Digital BLC R channel offset value92DM_LNL 00RWDummy Line low 8 bitsBit[7:0]:Control insert Dummy line[7:0]93DM_LNH 00RW Dummy Line high 8 bitsBit[7:0]:Control insert Dummy line[15:8]94-9C RSVD XX –Reserved9D LCCFB 00RW Lens Correction B Channel Control 9E LCCFR 00RW Lens Correction R Channel Control 9FDBLC_Gb00RWDigital BLC Gb Channel Offset ValueBit[7:0]:Digital BLC Gb channel offset value A0DBLC_Gr 00RWDigital BLC Gr Channel Offset ValueBit[7:0]:Digital BLC Gr channel offset valueA1AECHM40RWExposure Value - AEC MSB 5 bitsBit[7:6]:ReservedBit[5:0]:AEC[15:10] (see registers AECH for AEC[9:2] and COM1 for AEC[1:0])A2-A3RSVD XX –ReservedA4COM2500RWCommon Control 25Bit[7:0]:ReservedA5COM2600RWCommon Control 26Bit[7:0]:ReservedA6G_GAIN 80RWGreen Gain OptionBit[7:0]:Green gain when using digital AWBA7VGA_ST 14RW Vertical Start Point for VGABit[7:0]:Define vertical start point in VGA sub-windowing modeA8-AAACOMXX–ReservedNOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.Table 7Device Control Register List (Continued)Address (Hex)Register NameDefault (Hex)R/WDescription8.008.00AA1.50s4.507.20s6.20SECTION A-ALensLens HolderKey for image orientationPCBImage PlaneImage Sensor6.606.607.8010.204.50Module shown installed in the socketPackage SpecificationsOMechanical SpecificationsConnector InformationThe OV9650S1G uses a 24-pin socket connector. Table 9 shows a listing of some recommended connectors.Optical SpecificationsTable 8Mechanical DimensionsParameterSpecification CommentsSensor 5.1 mm x 5.72 mm CMOS in housingLensGlass/Plastic Connection Type 10.2 x 10.2 x 4.5 mm SMK socket (consult OmniVision for details)Module Housing8 mm x 8 mm x 7.20 mmTable 9 Recommended ConnectorsManufacturerPart No.DescriptionSMKCLE9024-0201E CLE9024-0301F T-54-10499T-347379-JIGUSocket connector Shield case (optional)Socket without locking mechanism (for testing purposes)Module extraction jigTable 10Optical SpecificationsParameterSpecification CommentsLens Elements Glass/Plastic Hybrid1 glass, 3 plastic (aspheric) fixed focusViewing Angle 60° diagonal Focal Length 4.7 mm F Number 2.8Focus Range 30 cm → ∞FilterIR cut IncludedMount Description M7 x 0.35P TV Distortion 0.51%Focus AdjustmentFixed80 cmOV9650S1GColor CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera ModuleOHandling Precautions•DO NOT try to open the unit enclosure as there is no user-serviceable component inside.•To prevent damage to the camera module by electrostatic discharge, handle the camera module ONLY after discharging ALL static electricity from yourself and ensuring a static-free environment for the camera module.•DO NOT touch the top surface of the lens.•DO NOT press down on the lens.•DO NOT try to focus the lens.•DO NOT put the camera module in a dusty environment.•To reduce the risk of electrical shock and damage to the camera module, turn OFF the power before connect and disconnect the camera module.•DO NOT drop the camera module more than 60 cm onto any hard surface.•To prevent fire or shock hazard, DO NOT expose camera module to rain or moisture.•DO NOT expose camera module to direct sunlight.•DO NOT put camera module in a high temperature environment.•DO NOT use liquid or aerosol cleaners to clean the lens.•DO NOT make any changes or modifications to camera module.•DO NOT subject camera module to strong electromagnetic field.•DO NOT subject the camera module to excessive vibration or shock.WARNING: READ THIS FIRST!Prior to handling any OmniVision camera module, read the following precautions.Handling PrecautionsONote:•All information shown herein is current as of the revision and publication date. Please refer to the OmniVision web site ( ) to obtain the current versions of all documentation.•OmniVision Technologies, Inc. reserves the right to make changes to their products or todiscontinue any product or service without further notice (It is advisable to obtain current product documentation prior to placing orders).•Reproduction of information in OmniVision product documentation and specifications is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. In such cases, OmniVision is not responsible or liable for any information reproduced.•This document is provided with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. Furthermore, OmniVision Technologies Inc. disclaims all liability, including liability for infringement of any proprietary rights, relating to use of information in this document. No license, expressed or implied, by estoppels or otherwise, to any intellectual property rights is granted herein.•‘OmniVision’, ‘CameraChip’, and ’OmniPixel’ are trademarks of OmniVision Technologies, Inc. All other trade, product or service names referenced in this release may be trademarks orregistered trademarks of their respective holders. Third-party brands, names, and trademarks are the property of their respective owners.For further information, please feel free to contact OmniVision at info@ .OmniVision Technologies, Inc.1341 Orleans Drive Sunnyvale, CA USA (408) 542-3000OV9650S1G Color CMOS SXGA (1.3 MegaPixel) OmniPixel™ Camera Module O。

Key FeaturesThe SD9366-EH-v2 is the latest professional IR speed dome camera with wiper from VIVOTEK, specifically designed to enhance low light surveillance in large coverage areas. Equipped with 250M IR illuminators and a 30x optical zoom lens, the SD9366-EH-v2 provides a superb low light image in the most challenging situations. The camera also adopts VIVOTEK's Smart IR II technology, Vari-Angle IR. VIVOTEK's Vari-Angle IR provides smooth vari-angle adjustment of the IR illuminators, allowing broad coverage FOV and highly uniform IR intensity while avoiding hot-spots traditionally associated with IR illumination.The SD9366-EH-v2 is the PTZ surveillance camera with IR Illumination to utilize H.265 compression technology. When combined with VIVOTEK's Smart Stream II technology users can obtain bandwidth savings of up to 80%* compared to traditional• H .265 Compression technology • 1080P Full HD CMOS Sensor • 60 fps @ 1080p Full HD • 30x Zoom Lens• 250M IR with Smart IR II (Vari-Angle IR)• 360° Continuous Pan and 220° Tilt• R emovable IR-cut Filter for Day & Night Function • W DR Pro for Unparalleled Visibility in High Contrast Environments • W eather-proof IP66-rated, Vandal-proof IK10 and NEMA 4X-rated Housing • -50°C ~ 55°C Wide Temperature Range for Extreme Weather Conditions • E IS (Electronic Image Stabilization) to Control Image Stability • E asy Cleaning with Built-in WiperH.264. By combining 1080p full HD resolution with H.265, IR illuminators, Vari-Angle IR, WDR, and 30x optical zoom, the SD9366-EH-v2 is able to capture fine details at top-notch quality, 24 hours a day, 7 days a week.VIVOTEK further strengthened the camera performance with an IP66- and NEMA 4X-rated housing to protect the camera against rain, dust, and corrosion. The SD9366-EH-v2 has a wide operating temperature range from -50°C to 55°C, ensuring continuous operation under the most extreme weather conditions and hazardous environments. This makes the SD9366-EH-v2 ideally suited to monitor wide open spaces such as ports, highways, cities, and parking lots where high-level precision is required.* Depending on scene.Without Smart IR IIWith Smart IR IISD9366-EH-v2Speed Dome Network CameraModel SD9366-EH-v2System InformationCPU Multimedia SoC (System-on-Chip) Flash128 MBRAM512 MBCamera FeaturesImage Sensor1/2.8" Progressive CMOSMax. Resolution1920x1080 (2MP)Lens Type30x Optical Zoom, Auto Focus Focal Length f = 4.3 ~ 129 mm (30x zoom) Aperture F1.6 ~ F4.7Iris Type DC-irisField of View 64° ~ 2.3° (Horizontal) 36° ~ 1.3° (Vertical) 73° ~ 2.6° (Diagonal)Shutter Time 1 sec. to 10,000 sec. WDR Technology WDR ProDay/Night YesRemovable IR-cut Filter YesMinimum Illumination *************(Color)************(B/W)0 Lux with IR illumination onPan Speed0.1° ~ 300° / sec. Pan Range360° endlessTilt Speed0.1° ~ 300° / sec. Tilt Range220° (-110° ~ +110°)Preset Locations256 preset locations128 presets per tourPan/Tilt/Zoom Functionalities 48x digital zoom (4x on IE plug-in, 12x built-in), Auto pan mode, Auto patrol modeIlluminators Built-in 850nm IR Illuminators up to 250meters with Smart IR II, IR LED*2Storage Seamless Recording to MicroSD/SDHC/ SDXC card and recording to network-attached storage (NAS)VideoCompression H265, H264, MJPEGMaximum Frame Rate H.265 & H.264: 60 fps @ 1920x1080MJPEG: 30 fps @ 1920x1080Maximum Streams 4 video streams(Up to 9 configurable profiiles)S/N Ratio66 dBDynamic Range130 dBVideo Streaming Adjustable resolution, quality and constantbit rate control, Smart Stream II Image SettingsTime stamp, text overlay, flip and mirror,configurable brightness/contrast/saturation/sharpness, white balance,exposure control, gain, backlightcompensation, privacy masks (Up to 24),scheduled profile settings, defog, 3DNR, EIS,HLCAudioAudio Capability Two-way Audio (full deuplex) Compression G.711, G.726Interface External microphone inputExternal line outputNetworkUsers Live viewing for up to 10 clientsSecurityAccess list, digest authentication, HTTPS ,IEEE 802.1x, Password protection, signedfirmware, Trend Micro IoT Security (bruteforce attack event, cyberattack event,quarantine event), user access log, useraccount managementProtocols802.1X, ARP, Bonjour, CIFS/SMB, DDNS,DHCP, DNS, FTP, HTTP, HTTPS, ICMP, IGMPv3,IPv4, IPv6, NTCIP, NTP, PPPoE, QoS (CoS/DSCP), RTSP/RTP/RTCP, SMTP, SNMP, SSL, TCP/IP, TLS 1.2, UDP, UPnPInterface10 Base-T/100 Base-TX Ethernet (RJ-45)*It is highly recommended to use standardCAT5e & CAT6 cables which are compliantwith the 3P/ETL standard.ONVIF Profile G, S, T supported, specificationavailable at Solution IntegrationVideo Motion Detection Five-window video motion detectionAuto-Tracking Auto-tracking on moving objectVADP Package Trend Micro (3-year free trial), Stratocast Alarm and EventEvent TriggerAudio detection, camera tamperingdetection, cybersecurity events (bruteforce attack event, cyberattack event,quarantine event), digital input, manualtrigger, motion detection, periodicaltrigger, recording notification, SD card lifeexpectancy, system bootEvent ActionEvent notification via audio clip, digitaloutput, email, HTTP, FTP, NAS server, SD card,push notificationFile upload via email, HTTP, FTP, NAS server,SD cardGeneralConnectorsRJ-45 cable connector for 10/100MbpsNetwork/PoE connectionAudio line inputAudio line outputAC/DC 24V power inputDigital input *4Digital output *2RS-485 (Pelco D, Baud rate 2400)* 1LED Indicator System power and status indicatorPower InputAC 24V, DC 24V, PoH/PoE (95W)(Simultaneous Power RedundancySupported)Power ConsumptionAC/DC 24V:Max. 63 W (Heater on) Max. 45 W (Heater off) PoH/PoE (95W):Max. 70 W (Heater on) Max. 51 W (Heater off)Dimensions 237 x 364 mmWeight 7.1 kg (with bracket) 5.7 kg (without bracket)CertificationsEMC: CE, LVD, FCC Class A, VCCI; Safety: UL; Environment: IK10, IP66, NEMA 4X Operating TemperatureStarting Temperature:-40°C ~ 55°C (-40°F ~ 131°F) Working Temperature:-40°C ~ 55°C (-40°F ~ 131°F) (DC 24V) -50°C ~ 55°C (-58°F ~ 131°F) (AC 24V/PoH (95W))*Wiper is functional at 10°C to 55°C (50°F to 131°F)Humidity 98% RH (non-condensing)Warranty36 monthsSystem RequirementsOperating SystemMicrosoft Windows 10/8/7 Mac 10.12 (Chrome only)Web Browser Chrome 58.0 or above Internet Explorer 10/11Other PlayersVLC: 1.1.11 or aboveIncluded AccessoriesPacking ContentsWall mount bracket, I/O cable, screws, waterproof connectors, terminal blocks, quick installation guide, alignment sticker, ground wire, T25 star driver, desiccant bagsDimensionsCompatible AccessoriesCabinetAT-CAS-001AT-CAB-002AT-SUN-002AT-SWH-000Cabinet for SpeedDome Cabinet for HLG PowerSupplySunshield Power Safety KitMounting KitsOthersAM-220AM-529AE-301AJ-001AJ-002AO-007Wall Mount Bracket (standard package)Mounting AdapterWater Tank,24VAC/DC, 0˚C ~ 60˚CUSB Joystick USB Joystick I/O Combo CablePower Adapter24VAC24VDCAA-352HLG-120H-24Outdoor Power Box, 24VAC/144W, IP67, IK10Industrial 24VDC/120W Power Supply, IP67All specifications are subject to change without notice. Copyright © VIVOTEK INC. All rights reserved. Ver. 46F,No.192,Lien-ChengRd.,Chung-Ho,NewTaipeiCity,235,Taiwan,R.O.C.|T:+886-2-82455282|F:+886-2-82455532|E:*****************|W:Compatible Accessories95W PoH/PoEAP-GIC-011A-095AP-GIC-015B-0951xGE 95W PoH/PoE Injector with Surge Protection 12KVOutdoor 1xGE 95W PoH/PoE Injector with Surge Protection 12KV, IP67,IK10。

2、Electrical Property Hardware configurationImage Sensor Scan Mode Maximum Resolution Omnivision OV8825 CMOS(colorful) Scan line by line3200 x 2400 (7,680,000 pixels)Sensor Optical Format Pixel SizeDynamic Range 1/3.2“1.4μm x 1.4μm 70.45dBADCSNRmaxSpectral Charactristics 12-bit, 8-Bit R.G.B t o PC35.7dB380-650nm (during daytime mode)Maximum Transmission Frame Rate（WiFi mode）Binning ModesXposure Capability 10FPS@2592x194415FPS@1920x108030FPS@1280x960, 1280x720, 1024x768, 800x600, 640x480Maximum Transmission Frame Rate（USB mode）10FPS@2592x1944, 2048x153630FPS@1920x1080,1280x960, 1024x768, 800x600, 640x480 60FPS@1280x7202 x 23.9ms - 320ms, Automatic and manualWhite Balance Software Interface Capture ModesAutomatic and manualDirectShowPhotos and videosWF300 Specification1、The size and the weight of main bodyThe view of 45°Top viewBottom viewWF300（Body net weight about 300g）Interface ParameterIllumination input interface Wireless Parameter/Power ParameterStandardOperating Frequency RangeAvailable Channels Data RateUSB （A FEMALE NUT ），DC5.0V ，maxium 1.0AWired picture / Charger interfaceMicro USB interfaceUSB2.0 DC5.0V 500mA （wired picture ）USB 2.0 DC5.0V 2A （when charging power)Display/ Special illumination device Hot shoe(no electrical connection)802.11b/g/n 2.400 ~ 2.4835GHz 802.11n 20MHz/40MHz 802.11b/gUSA, Canada (FCC):11 channels (2.412GHz~2.462GHz)Europe (CE): 13 channels (2.412GHz~2.472GHz)Japan (TELEC): 14 channels (2.412GHz~2.4835GHz)802.11n: up to 300Mbps 2T2R802.11b: up to 11Mbps 802.11g: up to 54MbpsTransmission Power Receiving Sensitivity 11n HT40 MCS7 : +16dBm +/-1.5dBm -61 dBm@10% PER at HT40 MCS7-68 dBm@10% PER at 54Mpbs -85 dBm@10% PER at 11Mpbs Suggestion on number of receiver on different resolutionThe Wireless work instructions When there has not WiFi ，LED lamp turn offWhen WiFi is opened but do not connect ，LED is always lightingWhen WiFi is connected, LED flashes at the beginning and stay turn on afterward Build in batteryContinuous working period Charging timeWhen WiFi is connected ，LED flashes ，about once per second ，The greater the amount of data the faster it flashes, and it is about 10 times per second3.7V, 5000mAh ，26650 rechargeable lithium coin cells About 8 hours About 4 hoursCharge lamp,(internal battery)10@640x4808@800x6006@1024x7685@1280x9604@1920x10805@1280x7203@2592x1944Charge Cycle Power-upPower lamp,(internal battery)Having problems in charging ：charge lamp ，red light flashes once per 0.5 second Low battery ：charge lamp ，green light breathes once per 1 secondMedium battery ：charge lamp ，green light breathes once per 2.5 seconds High battery ：charge lamp ，green light breathes once per 4seconds Fully charged ：charge lamp ，there will be always green lightWhen power quantity more than 20%：power lamp ，there will be always green lightWhen power quantity lower than 20%：power lamp ，there will be always red light When power quantity lower than 5%：power lamp ，it will turn off after flashing 10 seconds500 times @50% powerWired ： direct-current 5V ，power by USB cable Wireless: internal batteryCharge power: DC 5V 2A power plugCamera InterfaceCan connect with electron microscope 、eyepiece interface ；Diameter range ：Φ20~Φ46mm （realize by 7 accessories: 39~43mm jacket 、36~40mm jacket 、33~37mm jacket 、30~34mm jacket 、27~31mm jacket 、24~28mm jacket 、20~23mm jacket ）Operating EnvironmentOperating temperature Storage temperature Operating Humidity Storage HumidityWindows system demandWiFi work mode0℃~ 40℃-20℃~ 60℃10~60%RH 30~80%RHMicrosoft®Windows®XP / 7 / 8 /8.1(32 & 64 bit)iOS System Demand iOS6.0 or higher Android system demandAndroid3.0 or higherCPU: dual-core 1.7GHz or higher RAM memory ：1G or more Storage ROM ：suggest 8G or largerCPU: equal or more than the second generation Intel core 2.8GHzMemory: 2G or moreInternal wireless network cardSoftware EnvironmentWindows system demandUSB work modeMicrosoft®Windows®XP / 7 / 8 /8.1(32 & 64 bit)CPU: equal or more than the second generation Intel core 2.8GHzMemory: 2G or moreDVD-ROM （Need it during installing software ）3、AccessoriesYuntab20~23mm Jacket24~28mm Jacket 27~31mm Jacket 30~34mm Jacket33~37mm Jacket 36~40mm Jacket39~43mm JacketDVD DiskPC Software ：KoPa Capture above Ver6.0Android software ：KoPa Vision Pro※ Scan this QR code Sticker to get App for iOS（Paste the sticker to the housing, Link to Apple store ）※Scan this QR code Sticker to get App for Android(Paste the sticker to the housing)Wireless Software :KoPa Vision Pro4、Standard Configuration5895 Rue Ferrari San Jose, CA 951381 (800) 832-0060 | Fax: (408) 226-0900。

ov摄像头传感器group write的写法要使用OV摄像头传感器的Group Write指令来写入寄存器值，首先需要确定要写入的寄存器地址和对应的数值。

具体的写法可能会依赖于使用的编程语言和通信协议。

以下是一个示例，展示如何使用C#和I2C通信协议来进行OV摄像头传感器的Group Write操作：```csharp// 使用I2C通信协议的库，例如使用Windows.Devices.I2c命名空间下的类using Windows.Devices.I2c;// 创建I2C设备对象I2cDevice device = await I2cDevice.FromIdAsync(i2cDeviceId,i2cConnectionSettings);// 定义要写入的寄存器地址和对应的数值byte registerAddress = 0x00; // 替换为你要写入的寄存器地址byte[] writeValues = new byte[] { 0x12, 0x34, 0x56, 0x78 }; // 替换为你要写入的数值// 创建并写入Group Write指令byte[] writeBuffer = new byte[writeValues.Length + 1];writeBuffer[0] = registerAddress;Array.Copy(writeValues, 0, writeBuffer, 1, writeValues.Length);device.Write(writeBuffer); // 执行Group Write操作```在这个示例中，首先创建了一个I2C设备对象，然后定义了要写入的寄存器地址和对应的数值。

接下来，创建了一个字节数组writeBuffer，将寄存器地址和数值拷贝到writeBuffer中。

最后，使用I2C设备对象的Write方法执行Group Write操作，将writeBuffer中的数据写入寄存器。

ShenZhen Hong Jia Guang Xian Technology Co.,Ltd 产品规格承认书SPECIFICATION FOR APPROVAL客户名称 (Customer Name)：客户型号(Customer Number)：泓嘉光显型号(SKT Number) ： HDF3M-811报送日期 (Report Date) ：供应商确认会签栏(Supplier sign):单位制作审核批准泓嘉光显签章客户承认会签栏(Customer sign)：单位工程采购批准客户Customer签章客户意见ShenZhen Hong Jia Guang Xian Technology Co.,Ltd 1、主要规格ShenZhen Hong Jia Guang Xian Technology Co.,Ltd 2、产品结构图ShenZhen Hong Jia Guang Xian Technology Co.,Ltd3、功能检测表 1 测试标准（图1）（图2）（图3）（图4）深圳市泓嘉光显科技有限公司ShenZhen Hong Jia Guang Xian Technology Co.,Ltd4、可靠性测试NO测试项目测测试条件备注1高温存储温度：70℃时间：48 小时2低温存储温度：-30℃时间：48 小时试验完后，在常温常湿环境下放置2 小时后进行测试。

满足规格要求3高温使用温度：60℃时间：24 小时4低温使用温度：温度：-20℃时间：24 小时5高温高湿使用温度：60℃湿度：90%时间：24 小时6温度冲击试验温度(时间)：-30C（30mm）←→70℃（30min）循环次数：10循环7振动测试频率：50HZ振幅：2mm方向：X,Y,Z 各2 小时8跌落试验跌落于混凝土。

高度：120cm方向：6 面放置于专用跌落治具或单体模式深圳市泓嘉光显科技有限公司ShenZhen Hong Jia Guang Xian Technology Co.,Ltd5、包装1. Every module is placed into a tray until all empty slots of a tray are filled. Each tray contains100 modules.2. Each tray use an anti-static bag to prevent the module from moisture by partially socking outthe air from the stack.3. A stack have five trays.4. Insert a stack into a inner box.6、注意事项:1．当我们拿起模组的时候必须小心模组被静电损坏。