DESIGN OF QUASI-CYCLIC LDPC CODES BASED ON EUCLIDEAN GEOMETRIES

Quasi-Cyclic：LDPC 码的新进展宋挥师本文作者宋挥师先生，国家广播电影电视总局广播科学研究院工程师、博士。

关键词：LDPC 码 QC-LDPC 码 阵列码 RS 码自1996年低密度奇偶校验码(Low-Density Parity-check Codes, LDPC)被重新引起关注以来，围绕LDPC 码的研究和开发就没有停止过，主要在这几个方面：(1)对LDPC 码的纠错性能、最小距离、最小环长(Girth)分布和错误地板(Error Floor)等属性进行分析；(2)构造性能优异的LDPC 码奇偶校验矩阵；(3)研究和开发有效的编译码器实现方法；(4)研究LDPC 码的实际应用。

实际的通信系统对LDPC 码附加了一些特殊要求，如低复杂度的编译码器硬件实现等，若要将LDPC 码应用到实际通信系统中，除了要深入研究编/译码方法外，还必须对LDPC码的矩阵构造附加一些特殊的限制。

一般说来，构造LDPC 码的奇偶校验矩阵有两种方法：一种是先对校验矩阵设置一些属性限制，如最小环长或结点度分布等，再利用计算机搜索方法进行随机或者类随机生成奇偶校验矩阵；另一种是利用代数学或者组合理论构造LDPC 码的奇偶校验矩阵，使之具有规律的结构。

近两年蓬勃发展起来的类循环低密度奇偶校验码(Quasi-Cyclic LDPC)就是根据上述第二种方法构造的一类非常重要的LDPC 码。

与其它LDPC 码相比，QC-LDPC 码具有非常低的线性编码复杂度。

本文简要介绍QC-LDPC 码的定义和编码方法，并给出几种特殊的QC-LDPC 码。

QC-LDPC 码的定义在给出QC-LDPC 码的定义之前，先讨论几个概念。

1.循环矩阵。

它是一个方阵，将方阵中每一行的内容向右循环移动一个元素，就获得了矩阵的下一行内容；将矩阵的最后一行内容向右循环移动一个元素，就获得了矩阵的第一行内容；将方阵中每一列的内容向下循环移动一个元素，就获得了矩阵的下一列内容；将矩阵的最后一列内容向下循环移动一个元素，就获得了矩阵的第一列内容。

LDPC 码编/译码程序设计要求：用Matlab 编程实现（2016,1008）LDPC 码的编码器和译码器，并搭建仿真系统统计误码性能。

设计内容：一、LDPC 码参数 二、编码器 三、噪声信道 四、译码器a) 和积算法译码器 b) 最小和算法译码器 c) 修正最小和算法译码器 五、仿真分析一、 L DPC 码参数本设计采用准循环LDPC 码码型（Quasi Cyclic LDPC ，QC-LDPC ），此种码型性能良好，并有利于硬件实现，现已被各种工业标准所采纳。

例如，Wimax 标准，DVB-S2标准。

具体矩阵请见：Matrix(2016,1008)Block56.mat 。

具有如下所示的结构：本设计采用系统码，码长为2016比特，1/2码率，信息序列长度为1008比特。

其H 矩阵表示如下：1,11,21,2,12,22,,1,2,b b b b b b n n m m m n H H H H H H H H H H ⎡⎤⎢⎥⎢⎥=⎢⎥⎢⎥⎢⎥⎣⎦L L M MOM L其中,i j H 是大小为z ×z 的循环移位矩阵，行重为1，它的值表示该矩阵的循环移位偏移量。

例如：,i j H ＝n ，则表示此矩阵第1行的第n 列为1，其余列为0，其余各行均是上一行的循环移位；如果,0i j H =，则表明该矩阵是一个全零矩阵。

例如,i j H ＝4，z ＝7，则对应的矩阵结构为：0001000000010000000100000001100000001000000010000ij H ⎡⎤⎢⎥⎢⎥⎢⎥⎢⎥=⎢⎥⎢⎥⎢⎥⎢⎥⎢⎥⎣⎦本设计给出的QC-LDPC 码，z 取56。

由于本设计采用系统码，H 矩阵被分为两个部分|p s H H ⎡⎤⎣⎦：1,11,1,11,2,12,2,12,,1,,1,b b b bb b b b bb b b b k k n k k n m m k m k m n H H H H H H H H H H H H H +++⎡⎤⎢⎥⎢⎥=⎢⎥⎢⎥⎢⎥⎣⎦L L L L M OM M O M LL其中p H 对应校验比特部分，大小为b b m z m z ⨯；s H 对应信息比特部分，大小为b b m z k z ⨯，其中()b b b k n m z =-。

滑动矩形窗式的QC-LDPC码设计汪汉新;苏开友【摘要】提出了一种滑动矩形窗式QC-LDPC码的构造方法,该方法无需计算机搜索便能消除4环,然后根据矩形窗在全矩阵中的滑动将其覆盖的元素取出作为基校验矩阵的原始部分,得到的矩阵具有不同的扩展系数及结构,并通过去对角线法改进矩阵的度分布.仿真结果表明：该方法在误码性能损失不多的情况下,可实现码率、码长的灵活变化,提高了可用QC-LDPC码的范围,更适合于自适应传输系统.同时,校验矩阵采用准双对角线结构,其编码算法具有线性复杂度,便于硬件实现.%A Slide Rectangular Window' s design method for QC-LDPC codes with agilely variable length and rate is proposed, which can eliminate the cyclic 4 without computer search. The data portion of the parity-check matrix would have different spreading coefficients and structures by using the slide rectangular window in the global matrix, the degree distribution was optimized by eliminating the diagonal line of the matrix. Simulation results show that the proposed method can expand QC-LDPC codes lengths and rates with less performance loss, and the parity-check matrix with a dual-diagonal structure has linear encoding complexity. The designed QC-LDPC codes are suitable for the adaptive transmission systems and hardware implementation.【期刊名称】《中南民族大学学报（自然科学版）》【年(卷),期】2012(031)004【总页数】5页(P79-82,104)【关键词】LDPC码;滑动矩形窗;围长;码长;码率【作者】汪汉新;苏开友【作者单位】中南民族大学电子信息工程学院,武汉430074;中南民族大学电子信息工程学院,武汉430074【正文语种】中文【中图分类】TN911.22QC(Quasi Cyclic)LDPC 码［1］是一类结构化的LDPC码，其校验矩阵H由基校验矩阵Hb中的元素经方块子矩阵扩展后得到，易于高效编译码，适合硬件实现，因此QC-LDPC码成为当前通信领域研究热点之一.在构造LDPC码H矩阵时，需要考虑一个很重要的约束条件就是避免4环的存在.环是指与H矩阵对应的Tanner图中，形成闭合回路的边数，其中最小环称为围长［2］，其大小与Hb矩阵中的元素值有关［1］.通过修改元素值可实现较大围长［3，4］和改进围长为6的H矩阵［5-8］，进而提高QC-LDPC码的误码性能.例如zhang等人提出的BIBD的构造方法［3］，能构造出围长为10的H矩阵;Kim等人通过设计母矩阵能将H矩阵的围长提高到14或18［4］.虽然H矩阵围长的提高，有利于译码的同时能获得较好性能，但符合要求的码的数量很少，而且随着围长的增大，其码长也要达到一定长度，因此无法满足码长连续的要求，限制了该码的实际应用.优化无4环是指在H矩阵的围长为6的情况下，对非规则QC-LDPC码的循环移位次数和度分布进行优化，提高误码性能.其中最为典型的是围长为6的IEEE802.16e［5］标准中 LDPC 码的设计;另外还有最大化 ACE［6，7］和最小误码率准则［8］等优化方法，但是算法复杂度较高，且无法连续对一系列不同码长进行优化.除此之外，基于等差数列也能快速构造出无4环的H矩阵［9］，但未经优化处理时，其误码性能较差，且当Hb矩阵较大时，置换矩阵的长度也要求很长，码长的范围受到不同程度的限制.以上改进方法中，由于增大围长要求较高，且多倾向于规则LDPC码的构造;而802.16e标准LDPC码的码率范围和码的数量有限，不适合自适应传输系统中码长码率灵活变化的要求.因此，本文提出一种基于代数理论的滑动矩形窗式构造QC-LDPC码的方法，并采用去对角线法来优化H矩阵的度分布.与802.16e标准LDPC码相比，本方法构造的QC-LDPC码具有较好的优越性.1 滑动矩形窗式LDPC码的构造方法1.1 矩阵的构造全矩阵Hs的结构如式(1).其中，Sij(1≤i≤N，1≤j≤N)表示矩阵中第 i行第j列置换矩阵的循环移位次数，该值不小于－1，正整数表示循环右移，0表示单位矩阵，－1表示零矩阵;扩展因子z表示置换矩阵的维数，则Hs扩展后的矩阵大小为Nz×Nz.由文献［9］知，若循环移位次数Sij满足式(2)，且z满足一定值时，则构造出的矩阵无4环.和文献［9］相比，本文的Hs矩阵元素的计算公式，满足要求的z值更小.例如构造4×4的矩阵，矩阵A的z值应不小于22，而矩阵B的z值应不小于12，两种方法构造的Hs矩阵如图1所示.图1 两种方法的比较Fig.1 Compare of two methods本文的QC-LDPC码的结构采用和802.16e标准LDPC码相同的准双对角线结构，其基校验矩阵Hb结构如式(5)～(7).其中，Hb1和Hb2分别为Hb矩阵中的数据部分和校验部分;Hb2是一个结构固定的矩阵，矩阵中的0和－1分别表示单位矩阵和全零矩阵;b(1)=b(m)=bm(bm为小于z的素数);b(r)=0.Hb1矩阵是Hs矩阵中的某一小部分，可由滑动形窗式构造法求得.根据式(2)，在Hs矩阵中一个任意大小的矩阵可由式(8)求出.对应的z值应满足式(9).其中，1≤i≤m;hf为矩阵的第一个第一列元素的值;ct为第一行公差;rt为第一列公差;m和k分别为Hb1矩阵的行和列的值.在自适应传输系统中，当码率发生改变时，由于码率R=k/(k+m)，因此只需改变其中m和k的值即可.例如当m=k=6时，码率R=1/2，最小码长可达6×62=372，步长为12;若R变为1/3，则在m不变的情况下，只需将k值变为3，在Hb1矩阵中相当于删除其中3列，相应的最小码长为9×16=144，步长变为9;或者将m和k的值变为4和2，则相当于删除其中2行和4列，最小码长变为6×7=42，步长为6.在码率变换方面可以看出，在码率变换方面非常灵活，无需重新构造，只需删除一定的行和列即可，而码长也可以在步长较小的情况下连续变化.同时通过修改hf、ct和rt的值，能构造出不同z值和Tanner图结构的Hb1矩阵，其最终达到的效果也不尽相同，这三个值的选取可在误码率和迭代次数之间权衡.例如，构造一个6×6的矩阵，其中hf=1、ct=0、rt=1，由此得到的矩阵如图2中实线矩形窗覆盖的矩阵.而当 hf、ct、rt的值变为 3、1、2 时，得到的矩阵如图2中虚线矩形窗.数值的变化在图2中就相当于实线矩形窗向左和向下各移一位到虚线矩形窗的位置.图2 全矩阵及滑动矩形窗Fig.2 Global matrix and slide rectangular window 因此，本文提出一种在结构、码长和码率可灵活变化的QC-LDPC码的构造方法——滑动矩形窗式构造法.首先，设计一个矩形窗的大小m×k，再放入全矩阵中进行平行移动，其覆盖的元素作为Hb矩阵中的Hb1部分，而Hb2部分则是m×m 的矩阵.之所以称为滑动矩形窗式构造法，是因为由式(8)计算得到的矩阵就如同矩形窗在全矩阵中平行移动得到的矩阵.如图2中实线框和虚线框所示.该构造方法和文献［9，10］相比，构造的Hb1矩阵，其z值要求更小，扩大了构造校验矩阵H的码长范围.1.2 Hb1矩阵的去对角线改进法若直接采用覆盖的矩阵，则构造出的QC-LDPC码中的行和列的度数一样，这相当于规则LDPC码，而规则LDPC码的误码性能会随着构造矩阵的增大而提升缓慢［11］.因此本文通过去对角线改进法，将行列度数相同的矩阵修改成具有不同度数的矩阵，能进一步提高校验矩阵的误码性能.去对角线法是指将Hb1矩阵中的元素沿着对角线用－1代替，即将这些位置的置换矩阵用零矩阵代替，实现度数的修改.例如将图2实线框中矩阵修改如式(10)所示结构，经过和Hb2矩阵合并得到如式(11)所示的Hb矩阵，仿真结果表明，通过该方法改进后能提高QC-LDPC码的误码性能.通过滑动矩形窗式构造的Hb矩阵以及简易的对角线改进法，在保证性能的同时，码长和码率能灵活变化.另外，由于H矩阵采用准双对角线结构，编码算法具有线性复杂度，因此非常适合自适应传输系统下的硬件实现.2 仿真结果分析实验条件是在AWGN信道下，采用快速迭代编码算法，BPSK调制，LLR BP译码算法，迭代次数20次.对本文构造的QC-LDPC码进行了蒙托卡诺仿真，同时也和IEEE802.16e标准LDPC码进行了比较.例如，当m=6时，构造的H矩阵部分参数如表1所示.表1 矩形窗式构造法码长码率灵活变化的H矩阵参数Tab.1 parameters of H with with agilely variable lengths and rates by using slide rectangular windowm k 码率 R 码长 L(t=0，1，2，...) m k 码率 R 码长 L(t=0，1，2，...)6 1 1/7 42+7t 6 2 1/4 88+8t 6 1/3 144+9t 6 4 2/5 210+10t 6 5 5/11 286+11t 6 6 1/2 372+12t 3 6 7/13 458+13t 6 8 4/7 574+14t 6 9 3/5 690+15t 6 105/8 816+16t 7表1给出了在m值确定的情况下，k值的不同，则码率不同，且码长也按照不同的步长连续变化.当k≤10时，码率范围从1/7到5/8.码长最小值从42到816，因此可以满足自适应传输系统的需求.图3是在相同码率的情况下，不同维度的基校验矩阵在改进前后的性能对比.从中可以看出在度数不大于6时，改进前后误码性能差别不大，但当度数大于6时，改进后的性能优势明显.这证明了对角线改进法能提高误码性能.在802.16e标准LDPC码中每种码率共有19种码长，由于码长和码率较多，因此选择部分码长码率进行比较.取其中576、960、1440和2304四种码长进行对比.仿真结果如图4所示.从图4中可以看出，本文构造的QC-LDPC码和IEEE802.16e标准LDPC码相比，在误码性能上都略有损失，但差别在一个数量级以内.在信噪比(dB)为2时，本文构造的码在码长为2304时，BER能达到10－5数量级，能够满足实际系统的需求.表2中，802.16e标准的 LDPC码的在码率为1/2时，码长从576到2304，且以96为步长共19种.文献［12］的码率从1/4到3/4共10种，步长从4到9共6中步长.本文构造LDPC码，其码率没有限制，最小码长为42，步长最小为4.图3 改进前后的误码性能比较Fig.3 BER performance before and after improvement表2 3种H矩阵的参数对比Tab.2 The parameters of different parity-check matrix H比较项目IEEE802.16e标准LDPC码文献［12］构造的LDPC码本文构造的LDPC 码无限制码长 576-2304 336-...42-...步长 96(t+1)，(t=0，1，...) 4，5，6，7，8，9 4-...性能(BER=10－4)码率 1/2，2/3，3/4 1/4，...，2/3，...，3/4 R=1/2，N=2304，iter=20 SNR=1.7dB R=1/2，N=2304，iter=20SNR=1.8dB R=1/2，N=2304，iter=20 SNR=1.87dB图4 本文QC-LDPC码和802.16e标准LDPC码的性能比较Fig.4 The BER performance for different QC-LDPC从表2的对比中可以看出，本文构造的QCLDPC码在误码性能略有损失的情况下，具有以下几个优点:码率更加灵活可变;码长的最小值可达42;步长更加宽泛;结构化设计以及改进算法的简易性.3 结语基于矩形窗式构造的QC-LDPC码以及去对角线改进法，相比其他构造和改进算法，本文算法设计简单且易于理解，同时该方法在误码性能损失不多的情况下，可实现码率、码长的灵活变化，提高了可用QC-LDPC码的范围，更适合于自适应传输系统.另外，校验矩阵采用准双对角线结构，其编码算法具有线性复杂度，便于自适应传输系统下的硬件实现.同时，去对角线方法还能有一定的研究优化空间，这也是下一步的工作.参考文献【相关文献】［1］Fossorier M P.Quasi-Cyclic Low Density Parity Check Codes From Circulant Permutation Matrices［J］.IEEE Trans Info Theory，2004，50(8):1788-1793.［2］Tanner R M.A recursive approach to low complexity codes［J］.IEEE Trans Info Theory，1981，27(5):533-548.［3］Zhang Fan，Mao Xuehong，Zhou Wuyang，et al.Girth－10 LDPC codes based on 3-D cyclic lattices［J］.IEEE Trans on Vehicular Technology，2008，57(2):1049－1060. ［4］Kim S，No J，and Chung H，et al.On the girth of Tanner(3，5)Quasi-Cyclic LDPC codes［J］.IEEE Trans Info Theory，2006，52(4):1739－1744.［5］IEEE 802.16e D5 Amendment to IEEE Standard for Local and Metropolitan Area Networks，Part 16:Air Interface for Fixed and Mobile Broadband Wireless Access Systems ［S］.New York:IEEE，2006.［6］Kang J，Fan P，Cao Z.Flexible construction of irregular partitioned LDPC codes with low error floors［J］.IEEE Communications Letters，2005，9(6):534-536.［7］Myung S，Yang K.Lifting methods for quasi-cyclic LDPC codes［J］.IEEE Communications Letters，2006，10(6):489-491.［8］Sharon E，Lisyn S.Constructing LDPC codes by error minimization progressive edge growth［J］.IEEE Trans Communications，2008，56(3):359-368.［9］彭立，朱光喜.QC-LDPC码的置换矩阵循环移位次数设计［J］.电子学报，2010，38(4):786-790.［10］郭锐，胡方宁，刘济林.一种低差错平底线性复杂度的 QC-LDPC码构造方法［J］.电路与系统学报，2011，16(6):87-93.［11］Luby M G，Mitzenmacher M，Shokrollah M A，et al.Improved Low-density Parity-check Codes Using Irregular Graphs［J］.IEEE Trans Info Theory，2001，47(2):585-598. ［12］韩辉，刘磊，詹磊，等.一种码率码长灵活变化的 QC-LDPC 码［J］.无线通信技术，2009，18(4):1-4.。

以太网数据转发约束的高速LDPC码设计李霈霈;周志刚;那美丽【摘要】为了灵活支持多种高速以太网接口，将低密度奇偶校验（LDPC）编码运用在以太网数据转发，取消传统数据包解码，提出了LDPC并行编码架构。

在考虑1G到100G以太网物理层编码码字长度约束的基础上，分别设计了针对1G、10G、100G接口中最大通道速率的LDPC（192，120），LDPC（594，462），LDPC（1188，990）码字，实现了信道编码处理的低时延。

仿真结果表明，构造的准循环LDPC码误码性能优，系统的处理时延小（考虑了编码时延和译码时延）。

LDPC编码时延在0.58~1.17μs之间，译码时延在3.20~4.26μs之间，可以满足不同以太网接口的最大通道编译速率。

%This paper presented interface-aware Low Density Parity Check (LDPC) codes in parallel encoding framework to support high-speed Ethernet data transmission and cancel the packets decoding process. Considering constraints of encoded codeword length of 1G to 100G Ethernet physical layer, LDPC(192,120), LDPC(594,462), LDPC(1188,990) codes aiming the maximum channel ratefor 1G, 10G and 100G Ethernet interface were designed to reach low latency in channel coding process. The simulation results claimed that LDPC codes have excellent performance and minimum processing delay in system, taking encoding delay and decoding delay into consideration. The encoding delay of 0.58~1.17 μs and the decoding delay of 3.20~4.26μs could meet the maximum code rate for different channels in Ethernet interfaces.【期刊名称】《电子设计工程》【年(卷),期】2016(024)022【总页数】4页(P1-4)【关键词】以太网接口;数据转发;并行编码架构;编码时延;译码时延【作者】李霈霈;周志刚;那美丽【作者单位】中国科学院上海微系统与信息技术研究所，上海 200050;中国科学院上海微系统与信息技术研究所，上海 200050;中国科学院上海微系统与信息技术研究所，上海 200050【正文语种】中文【中图分类】TN911.22以太网是现有局域网采用的最通用的通信协议标准。

CCSDS标准中LDPC码译码器研究与实现Research and Implementation of LDPC Codes Decoder in CCSDS Standards薛丽(中国西南电子技术研究所,四川成都610036)Xue Li(Southwest China Electronic Technology Institute,Sichuan Chengdu610036)摘要：目前，准循环LDPC(QC_LDPC)已经广泛应用IEEE802.11、IEEE802.16、DVB-S2、CCSDS、3GPP5G-NR等系列标准。

LDPC码的性能非常优越、复杂度较低、吞吐量高、可以进行并行解码，解码时延小。

该文针对CCSDS131.0-B-2标准中10种码字的LDPC码以码率为单位在FPGA上进行了兼容实现，并给出了进一步实现高速译码和降低硬件资源的方法，为在实际工程实现需要提供了重要参考。

关键词：准循环低密度校验码(QC_LDPC码)；译码器；FPGA实现中图分类号：TN911.22文献标识码：A文章编号：1003-0107(2021)05-0099-06Abstract:Nowadays,Quasi-cyclic low-density parity-check(QC_LDPC)codes has been widely used in IEEE 802.11,IEEE802.16,DVB-S2,CCSDS,3GPP5G-NR series of standards.LDPC code has excellent perfor-mance,low complexity,high throughput,parallel decoding and small decoding delay.This paper aims to compatible implement the10kinds of code in the CCSDS131.0-B-2standard on the FPGA,and gives the method of further realizing high speed decoding and reducing hardware resources,providing important reference to the realization needs of engineering.Key words:Quasi-cyclic low-density parity-check codes;decoder;FGPGA implementationCLC number:TN911.22Document code:A Article ID：1003-0107(2021)05-0099-060引言低密度校验码(LDPC)[1-2]是在1963年由Gallager发明的线性分组码。

5G-NR物理层协议由如下7个规范构成。

[1]3GPP TS38.201:“NR物理层概述”[2]3GPP TS38.202:“NR物理层提供的服务”[3]3GPP TS38.211:“NR物理信道与调制”[4]3GPP TS38.212:“NR复用与信道编码”[5]3GPP TS38.213:“NR物理层过程（控制）”[6]3GPP TS38.214:“NR物理层过程（数据）”[7]3GPP TS38.215:“NR物理层测量”NR物理层概述与其他层的关系总体协议架构本部分描述的无线接口指用户终端（UE）和网络之间的接口，包括L1，L2和L3。

3GPP TS 38.200系列规范对L1（物理层）进行描述。

L2和L3的描述见TS38.300系列规范。

图1无线接口协议体系结构图1显示的是与物理层相关的NR无线接口协议体系结构。

物理层连接L2的媒体介入控制子层（MAC）、以及L3的无线资源控制（RRC）层。

图中不同层/子层之间的圈表示服务接入点（SAPs）。

物理层向MAC层提供传输信道。

传输信道的特性通过信息在无线接入口上的传输方式确定。

MAC向L2的无线链路控制（RLC）子层提供不同的逻辑信道。

逻辑信道的特性通过传输信息的类型确定。

提供给上层的服务物理层向高层提供数据传输服务，这些服务的接入是通过使用MAC子层的传输信道实现的。

具体内容详见[2]。

物理层概述多址接入NR物理层多址接入方案基于OFDM+CP。

上行链路支持DFT-s-OFDM（Discrete Fourier Transform-spread-OFDM）+CP。

为支持成对和不成对的频谱，FDD和TDD 都被支持。

L1基于资源块以带宽不可知的方式定义，从而允许NR L1适用于不同频谱分配。

一个资源块（RB）以给定的子载波间隔占用12个子载波。

一个无线帧时域为10ms，由10个子帧组成，每个子帧为1ms。

一个子帧包含1个或多个相邻的时隙，每个时隙有7或14个相邻的符号。

Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) Codes for Deep Space and High Data RateApplicationsNikoleta Andreadou, Fotini-Niovi Pavlidou Dept. of Electrical & Computer Engineering Aristotle University of ThessalonikiThessaloniki, Greecenandread@auth.gr Stylianos Papaharalabos, P. Takis Mathiopoulos Institute for Space Applications and Remote Sensing National Observatory of AthensAthens, Greecespapaha@space.noa.grAbstract—In this paper we investigate and compare the performance of a selected class of Low-Density Parity-Check (LDPC) codes, i.e. Quasi-Cyclic (QC) LDPC codes, against the currently used turbo codes for deep space and high data rate applications. This is useful in future updates of the channel code option used for such applications by the Consultative Committee for Space Data Systems (CCSDS). A wide range of different code rates is examined and the obtained Bit Error Rate (BER) performance versus the Bit Energy to Noise Spectral Density ratio (E b/N0) is reported. Both low and high code rates are being studied, and specifically the 1/2, 1/3, 1/4 and 1/5 as well as the 2/3, 3/4 and 4/5 code rates are taken under consideration. The role of the iteration rounds in the decoding procedure of LDPC codes is also examined showing that QC-LDPC codes outperform the currently used CCSDS turbo codes. Another advantage of QC-LDPC codes is their simple encoding procedure, which reduces the encoding complexity. Since deep space applications are considered, the signals are transmitted over the Additive White Gaussian Noise (AWGN) channel, with the specific block size of 7136 bits.Keywords—Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) Codes, Turbo Codes, Deep Space Communications.I.I NTRODUCTIONThe evolution in the telecommunications area over the last years has led to an increased interest in using advanced error control coding techniques. Turbo codes, due to their enhanced Bit Error Rate (BER) performance, are considered as a serious candidate for modern communication systems [1]. Another coding scheme is Low-Density Parity-Check (LDPC) codes, which were first introduced by Gallager in 1963 [2]. Although LDPC codes had been neglected for many years, they have become the target of research and investigation over the last decade, after the development of practical decoding implementation technologies. Their main advantage is that their performance can be similar to that reached by turbo codes [3], however LDPC codes can allow parallel decoding This research work was carried out in the context of IST SatNEx-II FP6 Project (IST-027393)architectures, thus achieving higher throughputs as compared to turbo codes [4].LDPC codes are described by their parity check matrix and the way this is constructed. LDPC codes are divided into two categories, namely regular and irregular codes, with the latter ones experiencing a better BER performance in general. In addition, the modification introduced by the construction of the parity check matrix results in random codes [5] and also structured codes [6–8]. The former category describes LDPC codes when their parity check matrix is designed by a random computer-based procedure. On the other hand, the second category implies that this matrix has been constructed based on combinatorial methods. Such examples are the Quasi – Cyclic (QC) LDPC codes. Their main advantage against randomly constructed codes is that they involve easier implementation in terms of the encoding procedure [7]. The main feature of QC-LDPC codes is that their parity check matrix consists of circulant submatrices, which could be either based on on the identity matrix [8, 9] or a smaller random matrix [6]. Permutation vectors could also be used in order to create the circulant submatrices. Their encoding procedure can be accomplished by using a series of shift registers, while the complexity is proportional to the number of parity bits or the total code length [7].In this paper, a thorough study is carried out in terms of achievable BER under different coding schemes, such as turbo codes and LDPC codes, with low code rates as well as high code rates suitable for deep space and high data rate applications. In particular, QC-LDPC codes are employed, in order to reduce encoding complexity. The corresponding performance evaluation results show that QC-LDPC codes outperform the currently used Consultative Committee for Space Data Systems (CCSDS) turbo codes for a given number of iteration rounds. This performance evaluation study is useful in future updates of the channel code option used in deep space communications by the CCSDS [10].The rest of the paper is organized as follows. Section II describes the turbo codes currently used in deep space communications. The next Section III addresses the proposed LDPC code construction, the coding and decoding techniques used for such applications. In Section IV various performance evaluation results by means of computer simulations and appropriate comparisons are depicted, while the conclusions are drawn in Section V.II.T URBO C ODES U SED I N D EEP S PACE A PPLICATIONSFirst, state-of-the-art channel coding techniques have traditionally been used in deep space communications, as the received signal power in such applications is very low, due to the extremely large propagation distances. Thus, the use of powerful error-correcting codes is the enabler key, in order to provide with large coding gains and improve the link budget computations. For this, turbo codes have been used by the CCSDS since 1999 [10]. In particular, turbo codes have demonstrated an additional coding gain of approximately 2 dB with respect to the former channel code solution consisting of a Reed-Solomon (RS) code concatenated with a Convolutional Code (CC) through a bit interleaver [11].Fig. 1 depicts the turbo encoder used by the CCSDS standard. It is a Parallel Concatenated Convolutional Code (PCCC) that makes use of two Recursive Systematic Convolutional (RSC) codes, each one having 16-states and code rate equal to 1/4. The different code rate options in CCSDS standard, i.e. 1/2, 1/3, 1/4 and 1/6, are obtained through appropriate interconnections of the parity bits produced by the two RSC codes, as explicitly shown in Fig. 1. The interleaver permutation, been designed by Berrou, follows a deterministic procedure in order to reduce as much as possible the memory storage requirements. There are four frame length options in CCSDS standard, i.e. 1784, 3568, 7136, and 8920 bits. For trellis termination, an additional output sequence of bits is produced, depending on the code rate, in order to flash the constituent RSC encoders to the zerostate.Fig. 1. Turbo encoder used by CCSDS standard.III. P ROPOSED LDPC C ODING T ECHNIQUEA. Characteristics of LDPC codesLDPC codes belong to the category of linear block codes meaning that a codeword (c ) of n bits is produced by the original uncoded word (u ) of k bits. Their parity check matrix describes this class of codes, which is sparse and the majority of its digits are zero. A codeword c is valid if the subsequent parity check equation is true:H * c T = 0(1)The resultant code rate k /n defines the size of the parity check matrix, which is specified as (n – k ) x n . Uniform and non-uniform row and column weights as regards to the parity check matrix, result in regular and irregular LDPC codes, respectively [12].A typical characteristic of LDPC codes is that they can be described by a bipartite graph. Two groups of nodes, namely the check nodes and bit nodes constitute this bipartite graph. The size of the parity check matrix plays an important role in determining the number of these nodes, meaning that if its sizeis m x n , then the graph will consist of m check nodes and n bit nodes, respectively. One row in the parity check matrix is represented by one check node, whereas each bit node corresponds to one codeword bit [12]. The presence of an ace in each row of the parity check matrix means that the two corresponding nodes are connected to each other in the bipartite graph [13]. For example, if there is an ace in the third column and fifth row of the matrix, then the third bit node will be connected to the fifth check node. Having an irregular code implies that not every bit node is connected to the same number of check nodes. In Fig. 2 an example of a parity check matrix and its equivalent bipartite graph are demonstrated. ⎥⎥⎥⎥⎥⎥⎥⎥⎦⎤⎢⎢⎢⎢⎢⎢⎢⎢⎣⎡=110010010110111001100100101100101001010011011010001110010011000101101101HFig. 2. A parity check matrix (H) and its corresponding bipartite graph.B. Encoding Procedure of QC-LDPC Codes This class of LDPC codes is characterised by a parity checkmatrix H, which consists of square blocks, as already has been mentioned. The square blocks could either be the zero matrix or circulant permutation matrices. Eq. (2) illustrates apermutation matrix P of size q x q .0100001000011000P ⎡⎤⎢⎥⎢⎥⎢⎥=⎢⎥⎢⎥⎢⎥⎣⎦K M M M M K (2) Let P i stand for the circulant permutation matrix, which is derived from the identity matrix I after the latter one is shifted to the right by i times (0 ≤ i ≤ q ). The zero matrix is defined as P ∞, whereas the resulting parity check matrix H of size (j·q ) x (k·q ) is denoted in Eq. (3): 1(1)111122(1)2212212(1)k k k k j j j k jk a a a a a a a a a a a a P P PP P P P P H P P P P −−−⎡⎤⎢⎥⎢⎥=⎢⎥⎢⎥⎢⎥⎣⎦L L M M M M M L (3) where a il Є {0, 1, …, q – 1, ∞} [8]. Parameters k and j are related to the resultant overall code rate R by: R ≥ 1 – j / k (4)Special care should be taken so that q is set to a prime number and the equation q ≥ k ≥ j is not validated, otherwise the coding system would be inadequate.By selecting the parity check matrix in such a way results inreduced memory needed for storage, since after positioning theaces in the first row of each block matrix P, then the rest acescan easily be located. Depending on how the blocks are defined, we can obtain both regular and irregular QC-LDPC codes. In case of regular codes, the code rate is larger than 1 –j / k , as shown in Eq. (4) [8].In this paper we focus on QC-LDPC codes having a parity check matrix in the form of the following Eq. (5): (2)(2)2(3)2(3)(1)()0(,,)00000j k j k j k j I I I I I I P P P H q j k I P P IP−−−−−−⎡⎤⎢⎥⎢⎥⎢⎥=⎢⎥⎢⎥⎢⎥⎣⎦KK K K K L M M M KM K MK K (5)It is noticeable from Eq. (5) that this matrix is in upper triangular form leading to irregular codes. The encoding procedure is also facilitated, while the overall code rate is 1-j/k . C. Decoding Procedure In general an iterative algorithm, the so-called Message Passing Algorithm or Belief Propagation Algorithm, describesaccurately the decoding procedure followed by LDPC codes[14]. This algorithm is better comprehended via the code’s bipartite graph. Although its main structure is similar, several versions have been presented in the open technical literature [14], [15]. According to this algorithm, each bit node sends amessage to the check nodes with which it is connected, duringeach iteration round. This message is an estimation on the exact value of the corresponding codeword bit this node represents. Afterwards, all the messages received at each check node areupdated so that other messages are sent back to the neighbouring bit nodes, meaning that one iteration round is completed. Subsequently, the messages are further processed and the bit nodes send information back to check nodes, so that the algorithm is repeated. The messages exchanged betweenconnected nodes entail extrinsic information only, which is themain feature of the algorithm. As a result, the message sent by a check node to one bit node is based on the information received by the check node from all the other bit nodes except for this particular bit node. The situation is similar when it comes to messages sent from bit nodes to check nodes. At the end of each iteration round and after the bit nodes’ messagesare processed, a codeword is produced. Whether or not the resultant codeword is correct this is checked at the end of eachiteration round. The algorithm stops either after a predefined number of iterations are carried out or in case the correctcodeword is already found during the algorithm’s execution [14]. From this point, it is obvious that the number of iteration rounds plays an important role in the system’s performance. Incase the number of iteration rounds is small, it is likely that the correct codeword is not obtained. On the other hand, a greaternumber of iteration rounds, leads to an increased system’s complexity.The nature of the messages sent by the nodes determines the difference between the algorithm versions. For instance, themessages can be either log-likelihood ratios [15] or not [14]. Inthis paper, the messages sent at each iteration round of the decoding procedure are in the probability domain [14]. It should be also mentioned that irregular codes offer more protection to the information bits, due to the appropriateconstruction of their parity check matrix. In particular, the bit nodes that are connected to a greater number of check nodestend to update their values quicker than the ones that are only connected to a limited number of check nodes. Because of the way encoding is performed, these bit nodes are the ones that contain the useful information, meaning that the information bits are the first ones to be corrected as long as the iterativealgorithm proceeds. IV. P ERFORMANCE E VALUATION R ESULTSIn this section BER performance evaluation results areillustrated by the means of computer simulations. It is assumedBinary Phase Shift Keying (BPSK) modulation and the AWGN channel. In principle, regarding the LDPC codes the lower the code rate used the larger the parity check matrix becomes. Thus, more computer resources are required. In addition, due to the matrix calculations and to the numerous components the systems consists of, the total simulation time has been large. Consequently, there had to be a trade off between the number of transmitted data blocks and the minimum possible BER value the results approach. Moreover, the maximum number of iteration rounds used in the decoding procedure was set to 15, since it was observed that there was no noticeable difference at the resulting decoded words when more iteration rounds were applied.The simulations were run with a block size of 7136 bits. The number of iteration rounds was afterwards set to 5 in order to observe how a single parameter can affect the system’s performance. It should also be noted here that the iterationrounds concerning the turbo decoder were set to 10.Fig. 3. Bit error rate versus Eb/N 0 for QC – LDPC and turbo codes of code rates1/2 and 2/3 respectively.In Fig. 3 the BER performance is shown when QC-LDPC and turbo codes of 1/2 and 2/3 code rate are used. It is noticeable that the two code rates follow the same trend throughout the whole E b /N 0 range. It is also clear that for higher E b /N 0 rates, there is a sharp decrease concerning the BER of LDPC for both code rates. Two different curves are displayed for the LDPC code. In the first one the number of iteration rounds is set to 15, while in the second one it is set to 5. It is obvious that by changing one vital parameter, the system’s performance can be highly altered. A smaller number of iteration rounds means that the system fails to correct all the errors occurring during the signal’s transmission, whereas a larger number of iteration rounds leads to a better system’s performance. However, the main aspect observed from this graph is that LDPC codes outperform turbo codes, while the difference in their performance is significant especially for lower E b / N 0 values. This confirms the theory that LDPC codes are a promising coding technique and can result in a high system’s performance. It is also clear that when fewer iteration rounds are defined in the decoding procedure, the LDPC coding scheme seems to perform close to turbo codes.Both high and low code rates have been examined. Fig. 4 shows the system’s performance when the higher code rates are being employed into the system. In particular, 3/4 and 4/5 code rates are used both for LDPC and turbo codes. On the other hand, the system’s performance regarding the lower code rates, i.e. 1/3, 1/4 and 1/5, is illustrated in Fig. 5 and Fig. 6, respectively. The lower code rates are the ones that give themost interesting results regarding the system’s effectiveness.Fig. 4. Bit error rate versus Eb/N 0 for QC – LDPC codes of code rates 3/4 and4/5 respectively.Fig. 5. Bit error rate versus Eb/N 0 for QC – LDPC and turbo codes of code rates1/3 and 1/4 respectively.Correspondingly to the case of 1/2 and 2/3 code rate, the curves in Figs. 4, 5 and 6 experience the same inclination. Furthermore, it is noticeable that the deep fall in the BER plot occurs for lower E b /N 0 rates in Fig. 3 and higher ones in Fig. 4. This is explicable by the fact that for higher code rates, the bits redundancy is decreased at the expense of the signal’s quality. Thus, at the presence of fewer coded bits the protection offered to the original data bits is of inferior quality. As a result, the 1/5 code rate experiences the best performance, as it can be shown from Fig. 6.Fig. 6. Bit error rate versus Eb/N0 for QC – LDPC and turbo codes of code rate1/5.The most important thing to notice when examining the curves is that LDPC codes clearly outperform turbo codes for all code rates when a large number of iteration rounds are set. It is also apparent that when fewer iteration rounds are present, the system’s performance tends to become similar for LDPC and turbo codes.V.C ONCLUSIONSThe applicability of LDPC codes for future deep space and high data rate communication systems was demonstrated. Several code rates were examined and it was shown that LDPC codes outperform turbo codes, when a large number of iteration rounds was set. The two coding schemes experience a similar performance, when fewer iteration rounds were used. In addition, as opposed to the currently used turbo codes, QC-LDPC codes offer some implementation advantages in both the encoding and decoding side. That is, the use of a series of shift registers for linear time encoding operation and the possibility of a parallel decoding implementation.R EFERENCES[1] C. Berrou, A. Glavieux, and P. Thitimajhima, “Near Shannon limit errorcorrecting coding and decoding: Turbo codes”, IEEE Int. Conf.Commun. (ICC), pp. 1064-1070, Geneva, Switzerland, May, 1993. [2]R. G. Gallager, Low – Density Parity Check Code s. Cambridge, MA:MIT Press, 1963.[3]T. J. Richardson, and R. L. Urbanke, “Efficient Encoding of Low-Density Parity-Check Codes”, IEEE Trans. Information Theory, vol. 47, no. 2, pp. 638-656, Feb. 2001.[4] A. J. Blanksby, and C. J. Howland,: “A 960-mW 1 Gb/s 1024-b, rate 1/2low-density parity-check code decoder', IEEE Journal of Solid-State Circuits, Vol. 37, No. 3, pp. 404-412, 2002.[5]R. M. Tanner, “A recursive approach to low complexity codes”, IEEETrans. Inf. Theory, vol. IT-27, no. 9, pp. 533–547, Sep. 1981.[6]R. Echard, and C.Shih-Chun, “The π-rotation low-density parity checkcodes”, IEEE Globecom 2001, vol. 2, pp. 980–984. 25-29 Nov. 2001. [7]Z. Li, L. Chen, L. Zeng, S.Lin, and W. H. Fong, “Efficient Encoding ofQuasi-Cyclic Low-Density Parity-Check Codes”, IEEE Transactions on Communications, vol. 54, no. 1, Jan. 2006, pp. 71–81.[8]S. Myung, K. Yang, and J. Kim, “Quasi-Cyclic LDPC Codes for FastEncoding”, IEEE Transactions on Information Theory, vol. 51, no. 8, pp.2894 – 2901, Aug. 2005.[9] E. Eleftheriou and S. Olcer, “Low-density parity-check codes formultilevel modulation,” in Proc. IEEE Int. Symp. Information Theory (ISIT2002), Lausanne, Switzerland, Jun./Jul. 2002, p. 442.[10]TM Synchronization and Channel Coding, CCSDS 131.0 B-1, Sep.2003.[11]G. P. Calzolari, F. Chiaraluce, R. Garello, and E. Vassallo, “Turbo CodeApplications on Telemetry and Deep Space Communications”, in Turbo Code Applications: A Journey From a Paper to Realization, Chapter 13, (Ed.) S. Sripmanwat, Springer, 2005.[12]H. Zhong and T. Zhang, “Block-LDPC: A Practical LDPC CodingSystem Design Approach”, IEEE Trans. Circuits and Systems—I: Regular Papers, vol. 52, no. 4, pp. 766-775, Apr. 2005.[13]J. Hou,P. H. Siegel, and L. B. Milstein, “Performance Analysis andCode Optimization of Low Density Parity-Check Codes on Rayleigh Fading Channels”, IEEE J. Select. Areas Commun., vol. 19, no. 5, pp.924-934, May 2001.[14]Robert H. Morelos - Zaragoza, “The Art of Error Correcting Coding,Second Edition”, Wiley 2006.[15]H. Nakagawa, D. Umehara, S. Denno and Y. Morihiro, “A Decoding forLow Density Parity Check Codes over Impulsive Noise Channels”, IEEE ISPLC, pp. 85-89, 2005.。

基于有限域的QC-LDPC码编码协作通信及其联合迭代译码技术程浩;仰枫帆【摘要】To improve the performance of a communication system and push project realization,the QC-LD-PC code based on the additive groupof finite field is presented and through a special method,a full rank QC-LDPC ( Quasi-cyclic Low-Density Parity-Check) code is constructed and used in coding cooperative communication systems at the source node and the relay node. Thus a general check matrix is constructed. Then the double Tanner graph is derived and the joint iterative decoding algorithm is adopted based on the double Tanner graph at the destination node. Simulation results show that, when BER=10-4 and iteration times is 5,the ideal cooperative communication system performance is better than the non-cooperative and non-ideal cooperative systems for 1. 2 dB and 0. 8 dB; When the SNR for S-D equals that for R-D,the signal-to-noise ratio( SNR) of S-R channel rises, and the non-ideal cooperative communication system performance becomes better.%为了提高系统的性能和易于工程实现,提出了基于有限域加群构造的QC-LDPC码,通过特殊的构造方法构造出满秩的QC-LDPC码并将之应用于编码中继协作通信系统的源节点和中继节点处,并由此构成了总体校验矩阵,导出了双层Tanner图,目的节点处采用基于双层Tanner图的联合迭代译码算法。

第35卷第2期电子与信息学报Vol.35 No.2 2013年2月 Journal of Electronics & Information Technology Feb. 2013准循环多进制LDPC码构造杨民①张文彦②钟杰*②吴杰②①(同方电子科技有限公司九江 332000)②(浙江大学信息与通信工程研究所杭州 310027)摘要：该文研究准循环多进制LDPC码的构造，给出多进制LDPC码的设计流程和构造方法。

详细讨论了多进制LDPC码的性能影响因素，综合考虑了环长和环的连通性对性能的影响，研究了母矩阵扩展中偏移因子的选择以及GF(q)上非零元素替代。

同时提出了次优解的搜索方法，以降低搜索复杂度。

最后，将提出的方法用于不同阶数下LDPC码的构造。

仿真结果表明，通过新方法构造得到的多进制LDPC码与二进制码相比，在BPSK调制方式下在误帧率410−附近有0.2 dB的性能提升；在有限域阶数与调制阶数匹配的情况下，有更大的性能提升。

与相近码长，相同码率的多进制循环码相比，该文构造得到的多进制LDPC码在误帧率410−附近有0.25 dB的性能提升。

关键词：多进制LDPC；码构造；环长；满秩条件中图分类号：TN911.22 文献标识码：A 文章编号：1009-5896(2013)02-0297-06 DOI: 10.3724/SP.J.1146.2012.00403Construction of Non-binary QC-LDPC CodesYang Min① Zhang Wen-yan② Zhong Jie②Wu Jie②①(Tong Fang Electronic Technology Co., Ltd., Jiujiang 332000, China)②(Institute of Information and Communication Engineering, Zhejiang University, Hangzhou 310027, China)Abstract: The construction of non-binary quasi-cyclic low-density parity-check codes are investigated. Important factors that influence the performance of non-binary LDPC codes are discussed in detail. The circle length and connectivity are taken into account in the construction. The selection of shift values to extend the mother matrix and the replacement of non-zero elements over GF(q) for the parity check matrix are studied. Meanwhile, a suboptimum method with lower complexity is proposed to search for the solution according to the new formula.The method is applied to the construction of non-binary LDPC codes over different Galois fields. Simulation results show that the codes constructed by this method outperform the corresponding binary codes by 0.2 dB at FER around 410− on the BPSK AWGN channel. The performance gap is larger when the order of the Galois field equals the order of the modulation. Compared with non-binary cycle code with the same code rate and approximate code length, the constructed non-binary LDPC code gets an improvement of 0.25 dB at FER around 410−.Key words: Non-binary LDPC; Code construction; Girth; Full Rank Condition (FRC)1引言LDPC码是一种具有接近香农极限的优秀信道编解码方案。

专利名称：Quasi-cyclic LDPC (Low Density Parity Check)code construction发明人：Ba-Zhong Shen,Tak K. Lee申请号：US12508459申请日：20090723公开号：US20100023838A1公开日：20100128专利内容由知识产权出版社提供专利附图：摘要：Quasi-cyclic LDPC (Low Density Parity Check) code construction is presented that ensures no four cycles therein (e.g., in the bipartite graphs corresponding to the LDPC codes). Each LDPC code has a corresponding LDPC matrix that is composed ofsquare sub-matrices, and based on the size of the sub-matrices of a particular LDPC matrix, then sub-matrix-based cyclic shifting is performed as not only a function of sub-matrix size, but also the row and column indices, to generate CSI (Cyclic Shifted Identity) sub-matrices. When the sub-matrix size is prime (e.g., each sub-matrix being size q×q, where q is a prime number), then it is guaranteed that no four cycles will exist in the resulting bipartite graph corresponding to the LDPC code of that LDPC matrix. When q is a non-prime number, an avoidance set can be used and/or one or more sub-matrices can be made to be an all zero-valued sub-matrix.申请人：Ba-Zhong Shen,Tak K. Lee地址：Irvine CA US,Irvine CA US国籍：US,US更多信息请下载全文后查看。

QC-LDPC码基矩阵构造方法朱磊基;汪涵;施玉松;邢涛;王营冠【摘要】By using the special properties of Dayan Sequence and Golomb-Ruler, two methods are proposed to construct basis matrix of parity check matrix for quasi cyclic low density parity check code. According to the necessary and sufficient condition for parity check matrix that has no circle of length four, the designed QC-LDPC codes have circles no less than six. At the BER of 10-5, the simulation shows that comparing with RS and convolution code concatenate methods, the designs have nearly 2 dB more performance improvement. Meanwhile, comparing with methods proposed by IEEE802. 16e standard, Golomb-Ruler method has 0. 8dB performance decrease and Dayan Sequence method has 0. 9dB performance decrease. Those two methods have almost the same performance, the former has 0.1 dB gain than the latter.%利用发现的大衍数列和Golomb-Ruler的特殊性质,给出了两种准循环LDPC码的校验矩阵基矩阵的构造方法.根据校验矩阵不含长度为4的环的充要条件判断,设计的两种准循环LDPC码的环长至少为6.仿真显示,在10-5误码率条件下,这两种设计方案比传统的RS码和卷积码级联编码方案有接近2 dB的性能提升；相比于IEEE 802.16e标准给出的设计方案,基于Golomb-Ruler构造的QC-LDPC码在性能上有0.8 dB的差距,基于大衍数列构造的QC-LDPC码在性能上有0.9dB的差距；基于Golomb-Ruler构造的QC-LDPC码与基于大衍数列构造的QC-LDPC码有几乎接近的性能,前者比后者大约有0.1 dB的增益.【期刊名称】《现代电子技术》【年(卷),期】2012(035)005【总页数】3页(P68-70)【关键词】准循环;校验矩阵;基矩阵;大衍数列;Golomb-Ruler【作者】朱磊基;汪涵;施玉松;邢涛;王营冠【作者单位】中国科学院上海微系统与信息技术研究所,上海200050;中国科学院上海微系统与信息技术研究所,上海200050;中国科学院上海微系统与信息技术研究所,上海200050;中国科学院上海微系统与信息技术研究所,上海200050;中国科学院上海微系统与信息技术研究所,上海200050【正文语种】中文【中图分类】TN919-340 引言LDPC码最初由Gallager在1962年发现[1]，在被忽略了30年左右，由Mackay 等再度发现，并被证明具有接近香农限的优异性能[2-3]。

2017年6月Journal on Communications June 2017 第38卷第6期通信学报 V ol.38No.6基于寻找小重量码字算法的LDPC码开集识别于沛东，彭华，巩克现，陈泽亮（解放军信息工程大学信息系统工程学院，河南郑州 450001）摘 要：LDPC码的开集识别是信道编码识别领域的一个难点。

首先，对实现开集识别所需接收码向量的数量进行了分析，给出了其理论下界。

然后，根据这一下界，基于寻找小重量码字的算法，提出了一种新的LDPC码开集识别方法。

该方法在接收码向量空间的对偶空间中逐个寻找小重量向量，即待识别的稀疏校验向量，从而重建稀疏校验矩阵。

利用指数分布对迭代次数进行建模，给出了该方法的迭代停止准则及运算量分析。

在无误码条件下，新方法克服了已有方法在适用范围和所需数据量的局限。

在有误码条件下，与已有方法相比，在提高抗误码能力的同时保持较低的运算复杂度，更能满足实际应用的需求。

对于QC-LDPC码，利用其稀疏校验矩阵的准循环特性，可以显著提高识别性能。

关键词：信道编码识别；LDPC码；准循环LDPC码；指数分布中图分类号：TN911.7 文献标识码：ALDPC code reconstruction based on algorithmof finding low weight code-wordsYU Pei-dong, PENG Hua, GONG Ke-xian, CHEN Ze-liang(School of Information Systems Engineering, PLA Information Engineering University, Zhengzhou 450001, China) Abstract: LDPC code reconstruction without a candidate set is one of the tough problems in channel code reconstruction.First, theoretical analysis was provided for the number of received code-vectors needed for the reconstruction, and a low-er bound was derived. Then, according to the lower bound, and based on an algorithm for finding low weight code-words,a new reconstruction method was proposed. It looked for low weight vectors one by one from the dual space of the re-ceived code-vector space and used them to reconstruct the sparse parity-check matrices. Numb er of iterations and the computational complexity of the method were analyzed based on exponential distribution theory. Under noise-free condi-tions, drawbacks of the existing method, including limited applicable range and large quantity of required data, have been overcame. Under noisy conditions, the proposed method has higher robustness against noise and relatively low complex-ity, compared to existing methods. For QC-LDPC codes, the reconstruction performance can be further improved using the quasi-cyclic property of their sparse parity-check matrices.Key words: channel code reconstruction, LDPC code, quasi-cyclic LDPC code, exponential distribution1引言近年来，信道编码识别问题成为一个研究热点。

可快速编码的大围长QC-LDPC码构造刘原华;何华【摘要】A construction method of quasi-cyclic(QC)LDPC codes with fast encoding and large girth is proposed to reduce the effect of short cycles on the performance of iterative decoding while maintaining the low encoding complexity of LDPC codes. The check matrix is divided into two parts. The right part of the matrix has the quasi-dual-diagonal structure,which can perform the fast encoding directly,and reduce the encoding complexity of LDPC codes effectively. The circulant permutation sub-matri-ces are set one by one in the left part of the matrix to ensure the minimum number of short cycles,avoid the occurrence of short cycles,and guarantee the characteristic of large girth. The simulation results show that,in comparison with LDPC codes in IEEE 802.16e,the codes constructed with the new method have larger girth and less short cycles,and better error correction performance while maintaining the low encoding complexity.%为保证LDPC码在低编码复杂度的同时,减少短环对其迭代译码性能的影响,提出一种可快速编码的大围长准循环LDPC码构造方法.该方法将校验矩阵分成两部分,其中右半部分具有准双对角线结构,使其可利用校验矩阵直接进行快速编码,有效降低了LDPC码的编码复杂度;左半部分通过逐个设置其循环置换子矩阵以确保当前矩阵中的短环数最少,有效避免了短环的出现,保证了大围长的特性.仿真结果表明,与IEEE 802.16e中的LDPC码相比,新方法构造的LDPC码具有更大的围长和更少的短环,在低编码复杂度的基础上获得了更优的纠错性能.【期刊名称】《现代电子技术》【年(卷),期】2018(041)011【总页数】4页(P1-4)【关键词】LDPC码;准循环;循环置换矩阵;快速编码;校验矩阵;编码复杂度【作者】刘原华;何华【作者单位】西安邮电大学通信与信息工程学院,陕西西安 710121;西安邮电大学通信与信息工程学院,陕西西安 710121【正文语种】中文【中图分类】TN911.22-340 引言低密度奇偶校验码（LDPC）具有逼近Shannon限的纠错性能[1-8]，近年来成为编码领域的研究热点，目前已得到广泛应用。

低复杂度高围长LDPC二维网格法码字构造作者：章雪婷,陈少平,饶文贵来源：《现代电子技术》2014年第23期摘; 要：提出了一种基于二维网格法的低密度奇偶校验码（LDPC）构造方法。

该方法对斜率集进行更加严格的筛选，利用一组特殊的数列作为斜率子集，该数列中不存在任何三项元素公差相等和任何四项元素公差相等或者成两倍的情况，从而排除线段构成三角形和四边形的可能，突破原有围长8的限制，得到围长为10的LDPC码字，显著提升了误码性能。

采用该方法得到的码字校验矩阵具有准循环特性，能保证较低的编译码复杂度。

Matlab仿真结果表明，该码在瀑布区域具有良好的性能，同时具有较好的错误平层特性。

关键词：低密度奇偶校验码；二维网格法；码字校验矩阵；斜率集筛选中图分类号： TN919.3⁃34;;;;;;;;;;;;;;;;;;; 文献标识码： A;;;;;;;;;;;;;;;;;;;;;;; 文章编号：1004⁃373X（2014）23⁃0075⁃05Abstract： A LDPC construction method based on 2D lattice method is proposed in this paper. With the method， a strict selection of slope sets is carried out to avoid the possibility of forming triangle and quadrangle in configuration. As a result， girth⁃ten LDPC was accomplished to improve performance significantly instead of girth⁃eight one known as before. Besides， the resul⁃ting parity⁃check matrix has the feature of quasi⁃cyclic permutation， so that encoding and decoding of these codes can be efficiently implemented by using simple shift⁃registers. The result of simulation with Matlab shows that the proposed code performs excellent in the waterfall region and has good error floor property.Keywords： LDPC； 2D lattice； codon check matrix； slope set selection0; 引; 言LDPC码字最早由Gallager在1962年提出，因其较低的译码复杂度以及逼近香农极限的优异性能受到国内外学者与工业界的关注，广泛应用于光纤通信，信息存储以及无线通信系统等各个领域[1⁃4] 。

科技期刊英文摘要中标点符号及缩写的正确使用【篇一：科技期刊英文摘要中标点符号及缩写的正确使用】摘要：本文基于《光电子快报（英文版）》稿件的编辑加工实践，发现英文摘要写作存在不规范的问题，依据科技论文英文摘要的结构和编写原则，从写作内容和英文表达两方面进行了讨论，应当取消或减少背景信息、不写未来计划和言过其实的语句、内容一致但避免重复、正确使用冠词和数词、避免修饰语过长或冗余、避免使用动词的名词和动名词形式，并给出实例加以阐述，以期提高英文摘要的规范性，更利于文献的收录与检索。

关键词：科技论文；英文摘要；编辑加工；ei科技论文的英文摘要是国内外众多检索平台的收录内容之一，是全文内容的概括，是展现我国科研水平的重要窗口，因此它的编写质量受到了高度关注。

不同学科的期刊工作者对于英文摘要的编写要求展开了多方面的讨论，包括时态、语态、标点符号及缩写[1]、写作范式[2]、文体格式[3]、信息完整性[4]等。

笔者结合《光电子快报（英文版）》稿件的实际情况，对于英文摘要的编辑加工常见问题加以归纳分析，以供国内作者和编辑参考。

一、英文摘要的结构及原则国家标准gb/t 6447-986《文摘编写规则》将摘要定义为“以提供文献内容梗概为目的，不加评论和补充解释，简明、确切地记述文献重要内容的短文”，摘要应当具有自明性和独立性。

目前国际上的几大权威数据库对于收录期刊的英文摘要编写质量有很高的要求，一般要有几个必须的组成部分，同时应遵循一定的写作原则。

1.结构。

就《光电子快报（英文版）》来稿而言，大多具有一定的创新内容，为吸引更多的读者，采用报道性摘要[5]为宜。

根据多数科技期刊的做法，报道性英文摘要一般应包括四要素，即：目的（objective，purpose，aim）、方法（methods）、结果（results）、结论（conclusions）。

极少数稿件的创新内容较少，属于综述性文献，采用指示性摘要[5]为宜，重点概括出主题即可，可以不包括研究目的、方法、结果、结论等一些内容。

准循环LDPC码的编译码器设计及FPGA实现准循环低密度校验码(Quasi-Cyslic Low-Density Parity-Check
Codes,QC-LDPC)是LDPC码的一个子类。

QC-LDPC码在编码和译码时,具备了其它类型的LDPC码不具有的很多优点,例如准循环LDPC码通过调整相应的参数快速的构造大量的不同码率且性能较为合适的校验矩阵,而且可以采用移位寄存器的方式进行编码,大大降低了编码复杂度,译码也很简单。

目前准循环LDPC码已经成为CCSDS深空通信的备选方案之一。

本文作者结合国家自然科学基金重点项目,采用理论分析和硬件平台仿真相结合的方法,针
对CCSDS标准对准循环LDPC码的编码和译码进行了研究和实现。

主要完成的工作有以下几个方面:系统地介绍了LDPC码的编译码原理;重点分析了LDPC码归一化最小和译码算法的消息迭代更新公式以及准循环LDPC码编码实现方法。

在分析归一化最小和译码特点的基础上,根据准循环LDPC校验矩阵的特点,提出了准循环LDPC码译码器的FPGA实现方法,并给出了主要的硬件设计、门级仿真和硬件平台实测结果。

对准循环LDPC码的编码方案进行硬件资源与吞吐量方面的对比权衡,给出
了适用于FPGA硬件实现的编码算法,并给出了硬件实现的主要结构设计和编码
吞吐量。

硬件平台实测结果表明,本文设计的准循环LDPC码的FPGA编译码器各个工作指标满足深空通信的指标要求,可以应用于深空通信应用环境中。

专利名称：Quasi-cyclic LDPC encoding and decodingfor non-integer multiples of circulant size发明人：Lingqi Zeng,Yu Kou,Kin Man Ng,Kwok W.Yeung申请号：US13035770申请日：20110225公开号：US08572463B2公开日：20131029专利内容由知识产权出版社提供专利附图：摘要：In processing quasi-cyclic low-density parity-check (QC-LDPC) data, an input signal is received which includes decision and reliability information corresponding tounpadded data. Decision and reliability information corresponding to padded data is introduced into the input signal. Message passing is performed one or more times to obtain decoded data. This includes using (1) the decision and reliability information corresponding to the unpadded data and (2) the decision and reliability information corresponding to the padded data, where a preference is given to the decision and reliability information corresponding to the unpadded data over the decision and reliability information corresponding to the unpadded data during message passing. Zero padding is removed from the decoded data.申请人：Lingqi Zeng,Yu Kou,Kin Man Ng,Kwok W. Yeung地址：San Jose CA US,San Jose CA US,Cupertino CA US,Milpitas CA US国籍：US,US,US,US代理机构：Van Pelt, Yi and James LLP更多信息请下载全文后查看。

QC LDPC码低复杂度消环算法李晓峰;冯大政;胡树楷【期刊名称】《信号处理》【年(卷),期】2013(029)002【摘要】QC LDPC(Quasi-cyclic Low-density Parity-check)是一类半结构化的低密度奇偶校验码,其分块的矩阵结构具有超大规模集成电路实现上的便利,同时保持了优异的纠错性能.本文针对Qc LDPC码的基矩阵,提出一种移位因子的搜索方法及其改进版本.通过对基矩阵的扩展矩阵的Tanner图进行树形展开来进行环的检验,避免了传统算法中的复杂算术操作,降低了复杂度.在采用和IEEE 802.16e中码率为0.5的LDPC码方案相同的基矩阵条件下,本文的算法构造出的QC LDPC码具有更优的环长分布,同时纠错性能也有提升.%Quasi-cyclic LDPC code is a kind of half-structured low density parity check code. Its block-based property leads to highly structured integrated circuits implementation, without significant performance loss. An algorithm searching shift values for the nonzero entries in base matrix of a Quasi-cyclic LDPC code is proposed along with its improved version. By expanding the Tanner graph of the corresponding expansion matrix, cycles with given length can be detected. Unlike some former algorithms, arithmetic operations are avoided, which leads to a considerable complexity reduction. Given the same base matrix with code rate 0.5 as is used in the IEEE 802.16e standard, LDPC codes constructed by the proposed algorithms have better cycledistributions and achieve slightly improved error-correction performance than the IEEE 802. 16e LDPC code as well.【总页数】6页(P262-267)【作者】李晓峰;冯大政;胡树楷【作者单位】西安电子科技大学雷达信号处理国家重点实验室,陕西西安710071;西安电子科技大学雷达信号处理国家重点实验室,陕西西安710071;西安电子科技大学综合业务网理论及关键技术国家重点实验室,陕西西安710071【正文语种】中文【中图分类】TN911【相关文献】1.高效低复杂度的QC-LDPC码全并行分层结构译码器 [J], 吴淼;邱丽鹏;周林;贺玉成2.深空通信中高性能低复杂度的QC—LDPC码构造方法 [J], 郭锐;胡方宁;刘济林3.一种基于QC-LDPC码的低复杂度分层迭代译码器 [J], 云飞龙;朱宏鹏;吕晶;杜锋4.一种LDPC码校验矩阵消短环算法 [J], 胡新桂;孙刚5.大列重低复杂度的QC-LDPC码构造 [J], 赵辉;郭振勇;彭海英因版权原因，仅展示原文概要，查看原文内容请购买。

构造CDR标准中LDPC码的偏移矩阵法陈冬英【摘要】为构造调频频段数字音频广播(CDR)标准中LDPC码,提出了一种偏移矩阵构造法.该方法根据CDR标准中LDPC码的码长和码率有限,及其校验矩阵有准双对角线的特性,在高斯消元的基础上生成偏移因子构造LDPC码.该方法不仅加快搜索速度,并使其具有准循环与随机的特性.理论分析及仿真的结果表明:降低了构造LDPC码校验矩阵时计算的内存需求,计算复杂度也大大低于高斯消元构造法,且在10-4误码率下比高斯消元法有大约1.5 dB的编码增益,3 dB信噪比误码率达10-6级.【期刊名称】《电声技术》【年(卷),期】2015(039)009【总页数】4页(P87-90)【关键词】调频频段数字音频广播;低密度奇偶校验码;偏移矩阵;准双对角线【作者】陈冬英【作者单位】福州大学物理与信息工程学院,福建福州350108【正文语种】中文【中图分类】TN911.221 引言因中国DAB标准中1.536 MHz信道带宽限于FM/AM的兼容问题，于2013年8月提出了调频频段的数字音频广播标准CDR(China Digital Radio)，并发布复用和信道编码调制的相关标准［1］。

LDPC编码为CDR标准信道编码的核心模块。

该标准支持四种码率的LDPC码，其码长均为9 216［2］。

研究表明，LDPC码在码长很长时，具有逼近香农极限的优越性能，但随着码长的增加随之增大了复杂度与所需的存储空间，以及系统的开销［3－4］。

文献［5］表明，通过合理的矩阵构造，LDPC码在码长一定的条件下，性能逼近甚至超越随机的LDPC码［5］。

由文献［6］可知，编码的生成矩阵的获得，主要是通过对其设计的校验矩阵进行求逆运算，若采用常用的高斯消元求逆法直接对这些奇偶校验矩阵进行求逆时，由于计算机负担很大，特别是其需求的超大内存是大多数个人计算机所不具备的。

尽管文献［7］提出了有利于超大矩阵求逆，它的确可以解决计算机内存不足的问题，但是却使计算量变得更大。