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摘要航天领域技术应用在时刻进步，当前卫星系统的功能呈现出多样性和复杂性的特点，各项性能不断提高，除了对子系统间数据传输的高速率和高可靠性提出要求以外，同时对一体化传输、提高模块复用率、降低开发和制造成本、提高兼容性提出了更高的要求。
这一特点在小卫星平台上的需求尤为迫切，因此需要一种高性能的星上总线网络及对应的多元化架构来满足大数据量传输、实时控制数据传输以及低成本复用与容错的需求。
SpaceWire 技术就是作为下一代星上数据处理系统模型而提出的一种高速率、点对点、全双工、灵活、可定制容错架构的串行总线网络，基于SpaceWire标准设计的星上总线网络的特点，它有望实现上述需求而取代传统星上数据处理系统。
本文在详细分析SpaceWire 路由网络设计需求和深入研究SpaceWire 标准协议的基础上，完成SpaceWire节点接口、路由器设计及路由网络架构的研究。
其中包括SpaceWire节点接口和路由器的硬件设计实现、功能和性能测试以及SpaceWire 路由网络架构性能仿真分析与测试。
设计基于Altra的FPGA 平台使用Verilog HDL硬件描述语言自顶向下地实现，将各个模块按功能划分分别实现验证。
对设计的SpaceWire 总线网络的测试结果和分析证明本设计合理，传输、实时性和容错性能稳定，功能和指标基本符合设计要求，为实际应用设计的总线网络提供了理论和实践的支持。
关键词：SpaceWire标准；总线网络；节点接口；路由器；容错架构；- I -AbstractWith the advances in space technology and space applications, the function of the current satellite system showing the characteristics of diversity and complexity and the performance continues to increase, in addition to the request of the high-speed and high reliability of data transmission between the subsystems.Put forward higher requirements for the integrated transmission module reuse rate, lower development and manufacturing costs, improve compatibility. This feature is particularly urgent demand on the small satellite platform, need a high-performance satellite bus network and the corresponding diversification of structure to meet the large amounts of data, real-time control of data transmission, and demand for low-cost reuse and fault-tolerant . SpaceWire technology is a high rate data processing system model proposed in the next generation on-borad, point-to-point, full duplex, flexible, customizable fault-tolerant architecture serial bus network, based on the SpaceWire standard on-borad bus network characteristics, it is expected to achieve the above requirements and data processing systems replace the traditional star.In the paper, SpaceWire standard protocol of the detailed analysis of the SpaceWire routing network design requirements and in-depth study on the basis of completed SpaceWire node interface router design and routing network architecture are finished. Including SpaceWire node interface and router hardware design and implementation, functionality and performance testing, and SpaceWire routing network architecture performance simulation analysis and testing. Altra's FPGA-based platform, the design using Verilog HDL hardware description language to achieve top-down, the various modules by function, respectively, to achieve validation. Test results and analysis of the SpaceWire bus network designed to prove the rational design, transmission, real-time and fault-tolerant and stable performance, the basic functions and indicators meet the design requirements for the practical application of the design of the bus network to provide the support of the theory and practice.Keywords: SpaceWire standard, bus network, node interface, router, fault-tolerant architecture.目录摘要 (I)ABSTRACT (II)第1章绪论 (1)1.1课题背景及研究的目的和意义 (1)1.2国内外研究现状 (3)1.3本文的主要研究内容 (6)1.4论文章节安排 (7)第2章SPACEWIRE总线网络设计基础 (8)2.1S PACE W IRE标准物理层 (8)2.2S PACE W IRE标准信号层 (9)2.3S PACE W IRE标准字符层 (11)2.4S PACE W IRE标准交换层 (13)2.5S PACE W IRE标准数据包层 (15)2.6S PACE W IRE标准网络层 (15)第3章SPACEWIRE总线节点接口设计 (20)3.1S PACE W IRE总线节点接口整体设计 (20)3.2S PACE W IRE接口主状态机设计 (21)3.3S PACE W IRE接口发送器设计 (23)3.4S PACE W IRE接口接收器设计 (26)3.5流控制模块设计 (31)3.6本章小结 (32)第4章SPACEWIRE总线路由器及容错设计 (33)4.1S PACE W IRE路由器设计需求及整体设计方案 (33)4.2数据包识别模块的设计 (34)4.3路由表及其控制模块设计 (38)4.4裁决器及交换矩阵的设计 (40)4.5S PACE W IRE总线网络容错架构 (42)4.6本章小结 (43)第5章SPACEWIRE总线网络性能测试分析 (44)5.1整体测试方案 (44)5.2S PACE W IRE节点接口测试 (45)5.3S PACE W IRE总线网络路由测试 (48)5.4S PACE W IRE总线容错测试 (50)5.5S PACE W IRE总线网络性能分析 (52)5.6本章小结 (54)结论 (55)参考文献 (56)攻读硕士学位期间发表的论文及其它成果 (61)哈尔滨工业大学学位论文原创性声明及使用授权说明 (62)致谢 (63)第1章绪论1.1 课题背景及研究的目的和意义近年来，随着空间技术的发展和研究的深入，空间任务日益呈现出多样性和复杂性的特点，因而卫星系统的功能也出现了跨越式的发展，这就使得星上各个设备、子系统之间的数据交换、控制信息交换网络变得尤为复杂，性能要求也日益提高，此时，首先需要解决数据量较大、数据环境复杂的情况下星上数据处理系统的可靠性和实时性的问题，从而对负责数据传输的星上总线网络性能有了新的要求[1]。
第4部分应用分析复习题数字电路一、单项选择题（选择一个正确的答案，将相应的字母填入题内的括号中）1 .给出真值表如下，试绘出相应的波形图（）A B C L0 0 0 00 0 1 00 1 0 00 1 1 01 0 0 01 0 1 1A.B.C.D.2 .题示逻辑图如下，根据逻辑图可得出逻辑表达式为。
（）A. L=B. L=C. L=D. L=3 .题示的波形图如下，判断其对应的真值表正确的是（）。
A.A B C1 1 10 1 01 0 00 0 1B.A B C1 1 10 1 00 0 11 0 0C.A B C1 1 10 0 11 0 00 0 1D.A B C1 1 10 1 01 0 01 1 14 .A、B、C的真值表如下，试画出A⊙B⊙C的波形图（）A B C0 0 00 0 10 1 00 1 1A.B.C.D.5 .A、B、C的真值表如下，试画出,,的波形图。
（）A B C1 0 01 0 11 1 01 1 1A．B．C．D．6 .根据题目给出的逻辑图，选择正确的逻辑表达式（）。
A. L=B. L=C. L=D. L=7 .题示逻辑图如下，根据逻辑图可得出逻辑表达式为（）A．B．C．D．8 .A、B的波形图如下，则其对应的A、B、A+B的真值表是。
（）A.A B A+B0 0 00 1 11 0 11 1 1B.A B A+B1 0 00 1 11 0 11 1 1C.A B A+B1 0 10 1 10 0 01 1 1D.A B A+B0 0 00 1 01 0 01 1 19 .已知A、B、C的波形图如下，试画出,,的真值表（）。
A., ,1 1 00 1 00 1 00 1 1B., , g”>1 1 00 1 00 1 00 0 1C., , >1 1 00 1 00 1 01 0 1D., ,1 1 00 1 00 1 10 1 1FPGA一、单项选择题（选择一个正确的答案，将相应的字母填入题内的括号中）1 .以下为某FPGA器件的综合分析报告的一部分Selected Device:3s500efg320-4Number of Slices: 4233 of 4656Number of CLBS: 955 of 1164刚其点用的系统资源为（）。
FPGA实现实时适应图像阈值Elham Ashari电气与计算机工程系,滑铁卢大学理查德霍恩西计算机科学和工程系,纽约大学摘要：本文提出了一种基于实时阈值的通用FPGA结构。
硬件架构是基于一种加权聚类算法的架构,这种算法的重点就在于聚类的前景和背景像素的阈值问题。
该方法采用聚类的二值加权神经网络法找到两个像素组的质心。
图像的阈值是两个质心的平均值。
因为对于每个输入的像素，选定的最近的权值是用来更新的，因而推荐一种自适应的阈值技术。
更新是基于输入像素的灰度级和相关权值的差额的，通过学习快慢因素来衡量其速率。
硬件系统是在FPGA平台上实现的，它包含两个功能模块。
第一个模块获得图像框架阈值，另一个模块将阈值应用于图像的框架。
两个模块的并行性和简单的硬件组成部分使其适用于实时应用程序，并且，其性能可与经常用于离线阈值技术相媲美。
通过利用FPGA对无数的例子进行模拟和实验，得到该算法的结果。
这项工作的基本应用是确定激光的质心，但接下来将会讨论它在其他方面的应用。
关键词:实时阈值,自适应阈值,FPGA实现、神经网络1 简介图像二值化是图像处理的一个主要问题。
如果要从一张图像上提取有用的信息，我们需要将它分成不同的部分（例如背景色和前景色）来进行更为详细的分析。
一般来说，前景色的像素的灰度级与背景色的灰度级是不同的。
现在已有一些较好的使图像二值化地算法，就性能而不是就速度而言，这些算法的主要目标在于高效率，然而对于一些应用，尤其对是在那些定制的硬件和实时应用程序来说，速度则是最关键的要求。
可实现的快速而简单的阈值技术在实际成像系统中得到广泛应用。
例如，结合了CMOS图像传感器的片上图像处理技术普遍存在于各种各样的成像系统当中。
在这样一个系统当中，图像的实时处理及其得到的相关信息是至关重要的。
实时阈值技术的应用领域包括机器人、汽车、目标追踪以及激光测距。
在激光测距，即确定目标的运动范围的过程中，所捕获的图像为二值图像。
[1] Using FPGA technology towards the design of an adaptive fault tolerant frameworkErdogan, Sevki (University of Hawaii); Gersting, Judith L.; Shaneyfelt, Ted; Duke, Eugene L. Source: Conference Proceedings - IEEE International Conference on Systems, Man and Cybernetics, v 4, IEEE Systems, Man and Cybernetics Society, Proceedings - 2005 International Conference on Systems, Man and Cybernetics, 2005, p 3823-3827ISSN: 1062-922X CODEN: PICYE3Conference: IEEE Systems, Man and Cybernetics Society, Proceedings - 2005 International Conference on Systems, Man and Cybernetics, Oct 10-12 2005, Waikoloa, HI, United States Sponsor: IEEE Systems, Man and Cybernetics Society Publisher: Institute of Electrical and Electronics Engineers Inc.Abstract: In this paper we propose architecture for a Reconfigurable, Adaptive, Fault-Tolerant (RAFT) framework for application in real time systems with require multiple levels of redundancy and protection. Typical application environments include distributed processing, fault-tolerant computation, and mission and safety-critical systems. The framework uses Field Programmable Gate Array (FPGA) technologies with on the fly partial programmability achieving reconfiguration of a system component when the existing components fail or to provide extra reliability as required in the specification. The framework proposes the use an array of FPGA devices to implement a system that, after detecting an error caused by a fault, can adaptively reconfigure itself to achieve fault tolerance. The FPGAs that are becoming widely available at a low cost are exploited by defining a system model that allows the system user to define various levels of reliability choices, providing a monitoring layer for the system engineer. ? 2005 IEEE. (21 refs.)[2]METHOD FOR PROTECTING COMPUTER THROUGH REAL-TIME MONITORING BY PROTECTING EXECUTION FILE, AND COMPUTER AND SYSTEM PROTECTED BY THE SAMEPatent number: KR20040083409Publication date: 2004-10-01Inventor: AHN MU GYEONGApplicant: SAFEI CO LTDClassification:- international: G06F11/30; G06F11/30; (IPC1-7): G06F11/30- european:Application number: KR20040072633 20040910Priority number(s): KR20040072633 20040910View INPADOC patent familyView forward citationsReport a data error hereAbstract of KR20040083409PURPOSE: A method for protecting a computer through real-time monitoring, and the computer and a system protected by the same are provided to safely protect the computer by monitoring an interrupt or an event related to file handling and enable a user to perform setting conveniently. CONSTITUTION: A setting list(50) stores permission for changing an executable file. A detecting module(10) detects/intercepts occurrence of the interrupt or the event related to the file handling. An analysis module(20) checks the permission by comparing the interrupt or the event detected from the detecting module with the setting list after checking that the interrupt or the event is a request for changing the executable file by analyzing the interrupt or the event. A processing module(30) disuses or returns the interrupt or the event depending on an analysis result of the analysis module.[3] Method and system for protecting computer system from malicious software operationPatent number: US2004225877Publication date: 2004-11-11Inventor: HUANG ZEZHEN (US)Applicant:Classification:- International: G06F1/00; G06F11/30; G06F1/00; G06F11/30; (IPC1-7): G06F11/30 - European:Application number: US20040792506 20040303Priority number(s): US20040792506 20040303; US20030469113P 20030509View INPADOC patent familyView forward citationsAlso published as:CN1550950 (A)Report a data error hereAbstract of US2004225877A method and system for protecting a computer system from malicious software operations in real-time is disclosed. The security system combines system and user activity information to derive a user initiation attribute indicating whether or not a system operation is initiated by a computer user, and stop secrete malicious software operations that are not initiated by a computer user. The security system incorporates a plurality of attributes to support flexible security policy design, warn about potentially damaging operations by Trojan programs, and dynamically create security policies to allow trusted programs to perform trusted operations.[4]PREBOOT PROTECTION, IDENTIFICATION AND SECURITY OF A COMPUTER SYSTEMPatent number: WO0233522Publication date: 2002-04-25Inventor: TELLO JOSE ALBERTOApplicant: CODEX TECHNOLOGIES INC (CA)Classification:- international: G06F1/00; G06F21/00; G06F1/00; G06F21/00; (IPC1-7): G06F1/00; G06F9/445- european: G06F21/00N5A2D; G06F21/00N1C; G06F21/00N1V; G06F21/00N3P2 Application number: WO2000IB01659 20001017Priority number(s): WO2000IB01659 20001017; US199******** 19990104View INPADOC patent familyView forward citationsAlso published as:US6463537 (B1)Cited documents:WO0048063US5835597WO9613002US5610981WO9839701Report a data error hereAbstract of WO0233522A "personalized" computer with a unique digital signature which will not boot up or recognize any data storage or communication peripheral devices without a matching "personalized" smart card containing a complementary encrypted digital signature. A modified BIOS (Basic Input Output System) replaces the standard BIOS of a motherboard and allows a security engine microprocessor to take over preboot control of the computer from the motherboard CPU (Central Procesisng Unit), configures and operates the encryption-based security system, and enables or disables selected data storage devices and other user selectable peripherals upon start up and shut down of the computer. The enabling or disabling of peripheral devices involves the use of special enabling/disabling circuits. A modified DDL (Device Driver Layer), loaded in the hard drive of the computer as part of the resident O/S (Operating System) of the computer, and memory buffer circuits allows a real time encryption system to be in place for any communication or data storage device. A data encryption engine in the security engine microprocessor allows encryption and decryption of all data stored indata storage devices. Upon power up, reset or interrupt of the computer, the microprocessor looks for, and if present, reads from the smart card in the smart card reader which is logically connected to the security engine microprocessor. This invention can also be used to allow identification and authentication of the computer and its user in networks.[5]Temporarily authorizing the use of a computer programme protected by an electronic cartridgePatent number: GB2302968Publication date: 1997-02-05Inventor: ANTONINI PIERREApplicant: ANTONINI PIERRE (FR)Classification:- international: G06F21/00; G06F21/00; (IPC1-7): G06F1/00- european: G06F21/00N7P5HApplication number: GB199******** 19960701Priority number(s): FR199******** 19950705View INPADOC patent familyView forward citationsAlso published as:US5898778 (A1)FR2736448 (A1)DE19626972 (A1)Report a data error hereAbstract of GB2302968Use of a programme protected by an electronic cartridge in a computer system is authorised for a period limited by a number of hours or a date. So as to extend the use of a protected programme contained in the memory (103) of the computer system (100-106), the user needs to enter by means of the keyboard (105) into this system a password so as to reset the electronic cartridge (107). This electronic cartridge (107) preferably comprises a memory (108), a first counter (110), a second counter (112), a monostable element (113), an adder (114), a real time clock (109) and a cabled logic network (111). This device is connected to the outside of the computer system (100-106) by means of a connector. For renting software, this invention is able to control the use of these programmes.[6] System for computer software protectionPatent number: US5666411Publication date: 1997-09-09Inventor: MCCARTY JOHNNIE C (US)Applicant:Classification:- international: G06F1/00; G06F9/38; G06F21/00; G06F1/00; G06F9/38; G06F21/00; (IPC1-7): H04L9/00- european: G06F21/00N7P5H; G06F9/38S4L; G06F21/00N1C1Application number: US199******** 19940113Priority number(s): US199******** 19940113View INPADOC patent familyView forward citationsReport a data error hereAbstract of US5666411This system protects proprietary software from disclosure and unauthorized use, enforces license limits on number of users of the software, and prevents corruption of protected software by computer viruses. Software protected under this system may execute only on computer systems which incorporate a microprocessor capable of deciphering enciphered instructions in real time. Program files are first enciphered under control of a distribution cipher key. Prior to first use of software, program files must be customized on the user computer system. This customization procedure re-enciphers the programs, so that they are enciphered under a second cipher key. Customized programs may not execute on a computer system other than one constructed with a processor chip which incorporates a crypto microprocessor. The crypto microprocessor is capable of performing this re-encipherment, and of executing both enciphered and unenciphered programs. The customization program runs on user's computer system and normally accesses a remote Exchange database system by means of a modem to accomplish its task. Variations of customization process provide for storage of enciphered software on either a single system, a network server, or a site license repository system.[7]METHOD AND DEVICE FOR PROTECTION OF COMPUTER SYSTEM FROM ILLEGAL DISTRIBUTIONPatent number: BG48653Publication date: 1991-04-15Inventor: KOLEV VLADIMIR N (BG); MARDIROSJAN GARO KH (BG) Applicant: TS LAB KOSM IZSLEDV ANIJAClassification:- international: G06F5/00; G06F5/00; (IPC1-7): G06F5/00- european:Application number: BG198******** 19890712Priority number(s): BG198******** 19890712View INPADOC patent familyView forward citationsReport a data error hereAbstract of BG48653The invention is designed for the production and use of computer systems and their software. It provides complete protection against undesirable unauthorised copying and reproduction. The method of current real time of the computer system serves to establish a protection code combination for the software product currently used by it. The unit consists of a power supply unit (1), a quartz crystal standart (2), a real time register (3), a real time coder (4), a protection code register (5) and an interface package (6)[8]DEVICE FOR PROTECTING INFORMATION BY USING USB SECURITY MODULE ON BASIS OF PC AND CODE CHIPPatent number: KR20010048160Publication date: 2001-06-15Inventor: CHO JIN HO (KR); CHOI KWANG YUN (KR); HAN SEUNG JO (KR) Applicant: CHO JIN HO (KR); CHOI KWANG YUN (KR); HAN SEUNG JO (KR); SOFTPROTEC CO LTD (KR)Classification:- international: H04L9/00; H04L9/00; (IPC1-7): H04L9/00- european:Application number: KR199******** 19991125Priority number(s): KR199******** 19991125View INPADOC patent familyView forward citationsReport a data error hereAbstract of KR2001004816PURPOSE: A device for protecting information by using a USB security module on basis of a PC and a code chip is provided to prevent illegal copy and modification of the software or data by the illegal users on the basis of the PC and to protect the important data and information. CONSTITUTION: The device for protecting information by using a USB(Universal Serial Bus) security module on basis of a PC and a code chip includes a USB controller(10) and a code chip(100). The USB controller(10) is composed of a USB core(11) and an MCU(12). The serial data by the outer input by using the USB port are sent in the USB core(11) and are in/output serially after buffering. If all the input data are the module information request order languages, the module information is read from a PROM(103) of the code chip(100) and is output to the input step of the USB core(11) or the 17 bites are output to the input step of a buffer(101) in the code chip(100) or the 16 bites input from thebuffer(101) are input and output to the input step of the USB core(11) in the MCU(12). The code chip(100) is composed of the buffer(101), a KSE96 block(110), a controlling portion(130), a mode checker(102), a scrambler, the PROM(103) and an RSA calculating portion(140).[9] Security method for protecting a system, e.g. a computer or online system against unauthorized access, whereby a computer is used with a chip card reader, with an additional varying control question used for access authenticationPatent number: DE10218945Publication date: 2003-11-13Inventor: SCHWENK JOERG (DE); SAAR EV A (DE)Applicant: DEUTSCHE TELEKOM AG (DE)Classification:- international: G06F21/00; G07F7/10; G06F21/00; G07F7/10; (IPC1-7): G06F17/60 - european: G06F21/00N5A2D; G07F7/10D6K; G07F7/10D6PApplication number: DE20021018945 20020422Priority number(s): DE20021018945 20020422View INPADOC patent familyView forward citationsReport a data error hereAbstract of DE10218945Method for securing a system against unauthorized access, whereby an input device is used to input a value that is compared with a stored input code in order to provide access to a system. Following input of the code, e.g. a PIN, a further control question is asked via a system output unit, e.g. the monitor. The question includes information for providing the answer and the user must input the correct answer before access is granted. The invention also relates to a system for implementing the method that comprises a computer with a chip card reader. The information displayed in the additional control question changes each time an identification chip card is inserted in the reader.[10]Computer chip heat protection apparatusPatent number: US6496118Publication date: 2002-12-17Inventor: SMITH WARREN L (US)Applicant:Classification:- international: H01L23/34; H01L23/467; H01L23/34; (IPC1-7): G08B17/00- european: H01L23/34; H01L23/467Application number: US20010953001 20010911Priority number(s): US20010953001 20010911View INPADOC patent familyView forward citationsReport a data error hereAbstract of US6496118A heat protection apparatus includes a heat sink adapted for mounting to a computer chip for dissipating heat generated thereby, the heat sink having a base defining a channel peripherally thereabout. A cooling fan is mounted to the heat sink for dispersing the dissipated heat. The apparatus includes a logic circuit capable of evaluating resistance input data and capable of energizing an alarm upon a programmed condition. The apparatus includes a temperature sensitive polymeric tape spanning between a pair of conductors connected to the circuit. The conductors and polymeric tape are mounted in the channel. The circuit energizes the alarm if the resistance data indicates a temperature greater than a predetermined critical temperature parameter or if the data indicates a temperature rate of rise greater than a critical rate of rise parameter. The alarm may be audible or provide a visual indicator to a computer display.[11] Protection device for portable computersPatent number: US2005039502Publication date: 2005-02-24Inventor: A VGANIM MAIR (IL)Applicant:Classification:- international: G06F1/00; G06F21/00; G06F1/00; G06F21/00; (IPC1-7): E05B73/00 - european: G06F21/00N5A2D; G06F21/00N1Z; G06F21/00N5A2BApplication number: US20040497635 20040602Priority number(s): IL20010146897 20011204; WO2002IL00965 20021202View INPADOC patent familyView forward citationsAlso published as:WO03048907 (A3)WO03048907 (A2)AU2002365735 (A1)Report a data error hereAbstract of US2005039502A protection device (16) particularly for portable computers (10) having a Universal Serial Bus (USB) socket (12) and a standardized dedicated slot (14) formed in vicinityof the socket (12). A key or the like operable mechanism (18) is provided for rotatinga T-shaped tip member (20) which is adapted to be inserted into and locked by the slot(14). Plug (22) may be either a "demo" or part of an active device, which functions to enable/disable the operation of the computer. The device (16) may further be provided with arresting means in the form of a cable (24), which can be tied to an immovable object such as table leg (26) for protecting the computer (10) against theft.[12] Electronic system and corresponding method for protecting an access gate of a computerPatent number: EP1429226Publication date: 2004-06-16Inventor: NICCOLINI MARCELLO (IT)Applicant: INFOTRONIC SPA (IT)Classification:- international: G06F21/00; G06F21/00; (IPC1-7): G06F1/00- european: G06F21/00N1V3Application number: EP20020425770 20021213Priority number(s): EP20020425770 20021213View INPADOC patent familyView forward citationsView document in the European RegisterCited documents:EP1248179WO9743716US6009527Report a data error hereAbstract of EP1429226The invention relates to a system and a method for protected access to an input/output gate (2) of an electronic processor equipped with conventional microprocessor units, volatile and mass memory units, at least one display unit, and an operating system (4) arranged to handle the several processor units, said access gate (2) being a USB gate allowing connenction at fast receptacle to predetermined peripheral units (3) of the electronic processor that are entitled to accede to be plugged in. The method comprises the following steps: detecting, through the operating system (4), the type of any unit coupled to said USB gate (2); comparing the detected type with a stored list of the predetermined units (3) entitled to accede; disabling the USB gate (2) if the comparison gives negative result.[13]APPARATUS FOR PROTECTING COMPUTER USING FUNCTIONAL CHARACTERPatent number: WO03072451Publication date: 2003-09-04Inventor: LEE IN JA (KR)Applicant: LEE IN JA (KR)Classification:- international: B65D41/26; B65D51/24; B65D81/36; B65D41/02; B65D51/24; B65D81/00; (IPC1-7): B65D41/26- european: B65D41/26; B65D51/24L; B65D81/36D2Application number: WO2002KR00432 20020313Priority number(s): KR20020005975U 20020228View INPADOC patent familyView forward citationsAlso published as:AU2002239122 (A1)Cited documents:KR890016287UKR880016247UReport a data error hereAbstract of WO03072451The present invention relates to a apparatus for protecting computer for notifying the outside of each of operation state of virus inspection using the character apparatus connected to the computer. The present invention includes computer for generating and transmitting the USB code value corresponding to registry value inspected from each of operation state of vaccine engine, and character apparatus for inquiring and outputting the voice data corresponding to the USB code value received from the computer. Hence, the present invention has an effect on not only hearing the information to virus inspection through the voice irrespective of the time as it always surveys the vaccine engine, but also presenting a fine view around the computer and increasing the effective value of the character by forming the character apparatus as the character including a doll.[14] Multiple protecting system to protect personal computer data from burglary utilized flash memory drivePatent number: US2003079140Publication date: 2003-04-24Inventor: URA YOSUKE (JP)Applicant:Classification:- international: G06F21/00; G06F21/00; (IPC1-7): H04L9/00- european: G06F21/00N1D1; G06F21/00N1V3Application number: US20010002501 20011024Priority number(s): US20010002501 20011024View INPADOC patent familyView forward citationsReport a data error hereAbstract of US2003079140This invention provides the system to protect the data stored in personal computer from burglary. This invention features providing method to protect the data stored in personal computer from easy burglary by combining several types of protecting method in the system that data is input and output inserting flash memory drive into USB port on personal computer.[15]Secure general purpose input/output pins for protecting computer system resourcesPatent number: US6138240Publication date: 2000-10-24Inventor: TRAN ROBIN T (US); SIMONICH CHRISTOPHER E (US) Applicant: COMPAQ COMPUTER CORP (US)Classification:- international: G06F21/00; G06F21/00; (IPC1-7): G06F11/00- european: G06F21/00N1VApplication number: US199******** 19980619Priority number(s): US199******** 19980619View INPADOC patent familyView forward citationsReport a data error hereAbstract of US6138240A security device and methodology that prevents unauthorized access to general purpose I/O pins in a computer system. In a system according to the invention, secure general purpose I/O pins are utilized as enable signals for data transfer devices such as Universal Serial Port (USB) ports. In one embodiment of the invention, access to the secure general purpose I/O pins is governed by an administrator password that is protected by a memory slot in a security device. When an administrator (or other authorized user) desires access to the general purpose I/O register that controls the secure general purpose I/O pins, the administrator enters the administrator password. If the password is correct, the relevant slot of the security device is unlocked, thereby permitting completion of write cycles to the secure general purpose I/O register. If a write cycle to the secure general purpose I/O register is attempted while the relevantslot in the security device is locked, the write cycle is ignored. Control and monitoring of various system resources in a secure manner is thereby permitted via use of the secure general purpose I/O pins.[16] SECRECY-PROTECTING COMPUTER AND PROGRAMPatent number: JP2006338136Publication date: 2006-12-14Inventor: KANEUCHI HIDEApplicant: MITSUBISHI ELECTRIC INF TECHClassification:- international: G06F21/24; H04L9/32; G06F21/00; H04L9/32;- european:Application number: JP20050159474 20050531Priority number(s): JP20050159474 20050531View INPADOC patent familyView forward citationsReport a data error hereAbstract of JP2006338136PROBLEM TO BE SOLVED: To provide a secrecy-protecting computer which prevents a file from being operated in a computer except the computer from which the file is taken away.SOLUTION: When a file is closed by a filter driver provided between an I/O manager and a device driver, plain-sentence data 100 to be stored are encrypted, and the file is stored in a form of mixed data 130 which include the encrypted data and a MAC address 120 unique to the computer. When the file is opened, the encrypted data included in the mixed data are decrypted only when the MAC address included in the mixed data 130 accords with a MAC address 130 unique to the computer which opens the file.[17] ACCESS PROTECTION FOR A COMPUTER BY MEANS OF A PORTABLE STORAGE MEDIUMPatent number: WO2006074490Publication date: 2006-07-13Inventor: FUCHS HJALMAR DOUGLAS (ZA)Applicant: FUCHS HJALMAR DOUGLAS (ZA)Classification:- international: G06F21/20; G06F21/20;- european:Application number: WO2005ZA00176 20051130Priority number(s): ZA20040009657 20041130View INPADOC patent familyView forward citationsCited documents:WO03079163US6401205DE19508288NL9101506FR2783943Report a data error hereAbstract of WO2006074490This Invention relates to a memory device such as a memory stick with a unique identifier or ID to be used in conduction with an electronic device such as a Personal Computer as to enable a user to gain access or operate or control devices or services associated with the electronic device for example a PC or Laptop. The systems software running or operational on the electronic device and/or memory device will search and read a unique identifier on the memory device such as a serial number or code. Should the serial number or code not be Read operation of the electronic device is seized.[18]METHOD AND SYSTEM FOR PROTECTING AGAINST COMPUTER VIRUSESPatent number: WO2005008417Publication date: 2005-01-27Inventor: KWAN TONY (AU)Applicant: COMPUTER ASS THINK INC (US); KWAN TONY (AU) Classification:- international: G06F21/00; G06F21/00; (IPC1-7): G06F- european: G06F21/00N3P; G06F21/00N3V6; H04L29/06C6HApplication number: WO2004US22216 20040709Priority number(s): US20030486754P 20030711View INPADOC patent familyView forward citationsView document in the European RegisterAlso published as:WO2005008417 (A3)EP1644859 (A3)EP1644859 (A2)EP1644859 (A0)Cited documents:US5956408US6049671US2003084322US5948104US2003065926more >>Report a data error hereAbstract of WO2005008417A method for delivering an update to at least one user including creating an electronic communication including an update and a unique signature identifying, the electronic communication as including the update and sending the electronic communication to the user..[19] Systems, methods, and computer program products for privacy protection Patent number: US2003130893Publication date: 2003-07-10Inventor: FARMER BENNIE L (US)Applicant: TELANON INC (US)Classification:- international: (IPC1-7): G06F17/60- european: G06F21/00N9A2P1Application number: US20020291196 20021108Priority number(s): US20020291196 20021108; US20000638177 20000811; US20010337827P 20011108View INPADOC patent familyView forward citationsReport a data error hereAbstract of US2003130893A systems and method of transmitting or communicating unique data from a unique user through a communications and/or computer network to a third party, wherein the third party has no method of determining the personal-identifying information (PII) of the unique user upon receiving the data. The invention provides privacy protection and location for communication of data, voice orOther information via a communications network, for providing various services related to telemetric communications and other location-based services.[20]Method and apparatus for establishing computer configuration protection passwords for protecting computer configurationsPatent number: US6470454Publication date: 2002-10-22Inventor: CHALLENER DA VID CARROLL (US); ATKINS BARRY DOUGLAS (US); ARNOLD TODD W (US)Applicant: IBM (US)Classification:- international: G06F21/00; G06F21/00; (IPC1-7): G06F11/30; H04L9/00; H04L12/14- european: G06F21/00N5A2Application number: US199******** 19980331Priority number(s): US199******** 19980331View INPADOC patent familyView forward citationsReport a data error hereAbstract of US6470454A method and apparatus is provided for facilitating the generation and use of computer system configuration passwords which can be utilized in an enterprise or organization to allow authorized users having knowledge of the password associated with a particular data processing system to make and change configuration decisions, but which prevents unauthorized users from making and changing such configuration decisions. In the preferred embodiment, a unique identifier (such as a serial number) and an enterprise secret key are supplied to a one-way cryptographic hash function in order to generate the configuration passwords which are unique to each data processing system of the plurality of data processing system of the enterprise or organization.。
引言随着卫星技术的不断发展，卫星的功能越来越复杂。
卫星的功能离不开FPGA 技术的支持。
然而，卫星运转的环境非常苛刻，容易受到辐射颗粒的影响，进而导致单粒子翻转（Single Event Upset ，SEU）现象的发生。
针对这一问题，本文提出采用SRAM 型FPGA 抗单粒子翻转可靠性设计的方法，以提高卫星的可靠性。
FPGA 的原理FPGA（Field-Programmable Gate Array）是一种采用可编程门电路实现的集成电路。
通过FPGA，开发人员可以自由编程，将其变为自行制定的特定电路或处理器。
若干个可编程逻辑单元（Programmable Logic Block ，PLB）、一些时钟管理模块、存储器、和输入/输出模块等构成了FPGA 的架构。
各种模块间的连接通过可编程的路由器实现。
FPGA 的可编程性是其最大的特点之一，这一特性使FPGA 比前面的ASIC （Application Specific Integrated Circuit）更加灵活。
FPGA 的SEU 问题FPGA 在卫星中的应用已经变得非常广泛。
然而，卫星在轨运行的环境却非常恶劣，包括极端的温度、空气和重力等，其中最大的问题是粒子辐射。
在高能脉冲射线的辐射下，晶体管容易发生单粒子翻转，即SEU。
单粒子翻转有可能导致电路故障，进而产生错误的计算结果。
这种问题的出现会严重影响卫星的正常运转。
在FPGA 中，存储在SRAM 中的开关逻辑电路众多，这意味着FPGA 中存在着大量的SEU 敏感电路。
一旦发生单粒子翻转，存放在SRAM 中的状态就会被改变，从而导致计算结果的变化。
大多数FPGA 供应商都采用种种技术来加强FPGA 的SEU 抵御能力，而SRAM 型FPGA 对于单粒子翻转的敏感性也较高。
因此，加强SRAM 型FPGA 的抗SEU 能力尤为重要。
SRAM 型FPGA 抗SEU 技术目前，针对SRAM 型FPGA 的抗SEU 技术可以归纳为以下几种。
fault-tolerant的中文-回复题目：faulttolerant的中文意思及其应用领域的探讨引言：现如今，随着信息技术的高速发展，各行各业对于系统的可靠性要求越来越高。
而faulttolerant作为一种重要的技术手段，在信息领域扮演着重要的角色。
本文将着重探讨faulttolerant的中文意思以及其在不同领域的应用。
第一部分：faulttolerant的中文意思faulttolerant一词源于英文，fault意为“故障”，tolerant则是“容忍”的意思。
结合起来，faulttolerant可以翻译为“容错”或者“故障容忍”。
它指的是一种系统或设备在发生故障时，仍然保持运行，并且不会对整体系统的正常工作产生影响。
第二部分：faulttolerant的应用领域1.计算机科学领域：在计算机科学领域，faulttolerant技术被广泛应用于操作系统、数据库系统、网络通信等方面。
一些关键性的任务，比如银行交易、航空航天系统和核能系统等都需要高度的容错性，以确保任何故障都不会导致系统瘫痪或数据损失。
2.云计算与大数据领域：随着云计算和大数据应用的迅速发展，对于系统的可靠性要求也越来越高。
在这些领域中，faulttolerant被广泛使用以确保系统的高可用性。
例如，分布式存储系统和分布式计算框架通常采用冗余数据和备份策略，以应对节点故障和数据丢失的情况。
3.网络和通信领域：在网络和通信领域，faulttolerant技术用于保证数据的可靠传输。
例如，通过使用冗余的网络链路或路由协议，可以避免单个链路或节点的故障对整个网络的影响。
此外，还有许多基于容错技术的通信协议被应用于提高通信的可靠性。
4.工业自动化领域：在工业自动化领域，faulttolerant技术可应用于保证生产过程的持续运行。
通过使用冗余的传感器、执行器和数据采集设备，可以在故障发生时快速切换到备用设备，避免生产中断和设备损坏。
HMI—Human Machine Interface（人机界面）HTML—Hyper Text Markup Language（超文本链接标示语言）CM——Control Module控制模块SCM——Sequential Control Module顺序控制模块CPM——Control Processing Module控制处理模块CEE——Control Execution Environment控制执行环境CNI——Control Net Interface控制网络接口C200——Control processor控制处理器RM——Redundancy Module冗余模块IOMs——input/output Modules输入/输出模块SCE——Simulation Control Module模拟控制模块ACE——Application Control Module应用控制模块IOLIM——IO Link Interface Module接口模块FIM——Fieldbus Inerface Module现场总线模块PMIO—Process Manager Input/Output流程管理器输入/输出FTA-Field Termination AssembliesIOP——Input/Output Processor (card)输入/输出处理器（卡）ERDB——Engineering Repository Database工程数据库EMDB—Enterprise model database企业模型数据库RTDB—Real Time Database实时数据库ODBC—Open Database Connectivity开放式数据库连接SQL—Structured Query Language结构化查询语言PV—Process Value工艺价值SCADA—Supervisory control and data acquisition监督控制和数据采集FTE-fault tolerant Ethernet容错以太网CP-control processor控制处理器CNI-control net interface控制网接口FTEB-fault tolerant Ethernet bridge容错以太网桥RM-redundancy module冗余模块FIM-fieldbus interface module现场总线接口模块OPC-OLE for process control用于过程控制ACE-application control environment（应用控制环境）DSA-distributed system architecture分布式系统架构CEE-control execute environment控制执行环境ES-CE --Console Extension Station控制扩展控制站ES-F --Experion Flex StationES-C --Experion Console StationFTA--Field Termination Assembly (for Serial Interface) CDA server ：Contorl Data Access Server 控制数据接入服务器OPC：OLE for process controlDSA：disbuted system Architecture 分布式系统结构FTE：fault tolerant Ethernet 容错以太网RTD：热电阻T/C：热电偶PIM：pulse Input Module 脉冲输入模块SIM：Serial Interface Module 串口接口模块SIEMENS PLC常用英语缩写表集散控制系统——Distributed Control System（DCS）现场总线控制系统——Fieldbus Control System（FCS）监控及数据采集系统——Supervisory Control And Data Acqusition（SCADA）可编程序控制器——Programmable Logic Controller（PLC）可编程计算机控制器——Programmable Computer Controller（PCC）工厂自动化——Factory Automation（FA）过程自动化——Process Automation（PA）办公自动化——Office Automation（OA）管理信息系统——Management Information System（MIS）楼宇自动化系统——Building Automation System人机界面——Human Machine Interface（HMI）工控机——Industrial Personal Computer（IPC）单片机——Single Chip Microprocessor计算机数控（CNC）远程测控终端——Remote Terminal Unit（RTU）上位机——Supervisory Computer图形用户界面（GUI）人工智能——Artificial Intelligent（AI）智能终端——Intelligent Terminal模糊控制——Fuzzy Control组态——Configuration仿真——Simulation冗余——Redundant客户/服务器——Client/Server网络——Network设备网——DeviceNET基金会现场总线——foundation fieldbus（FF）现场总线——Fieldbus以太网——Ethernet变频器——Inverter脉宽调制——Pulse Width Modulation（PWM）伺服驱动器——Servo Driver软起动器——Soft Starter步进——Step-by-Step控制阀——Control Valver流量计——Flowmeter仪表——Instrument记录仪—— Recorder传感器——Sensor智能传感器——Smart Sensor智能变送器——Smart Transducer虚拟仪器——Virtual Instrument主站/从站——Master Station/Slave station操作员站/工程师站/管理员站——Operator Station/Engineer Station/Manager StationDCS画面常用常用缩写词语1ST1级FRQ频率A报警FSH末级过热器ADS自动调度系统FSSS炉膛安全监测系统AGC自动发电机控制FW给水AH空气预热器FWP给水泵AS轴向位移GC高压调门控制ATC汽轮机自动控制GEN发电机AUTO自动GV（高压）调节汽门AUX辅助的HH高高BASE基本HAV暖通BCP炉水循环泵HDR联箱，集箱BD排污HP高压缸BF锅炉跟随HTR加热器BFP锅炉给水泵IC中压调门控制BMCR锅炉最大连续出力ID标志，标识BMP燃烧器管理系统IDF引风机BOP轴承油泵IMP冲动式（级）BP旁路INCR提高，增加BRG轴承INTERM定期，间断BTG锅炉－汽机－发电机IV中压调门C切换LL低低CAF冷却风机LDC负荷指令计算机CAMP控制＋报警＋监测＋保护LOP顶轴油泵CCCW闭式循环冷却水Lp低压CCS协调控制系统LSH低温过热器CDSR凝汽器LUB润滑油COND凝结MANU手动（方式）CON连续的MCR最大连续出力COOR连续的MCS模拟量控制系统CORR校正，修正MEH小型汽轮机电液调节CRT显示器MFT主燃料失去保护CRH低温再热器MIN最小CSH包覆过热器MS主蒸汽CW循环水MW兆瓦D NO编号，第。
